进行formtting格式化调整

RT-Thread · Sep 12, 2024 · 704c85c · 704c85c
1 parent b8fe8bc
commit 704c85c
Show file tree

Hide file tree

Showing 13 changed files with 257 additions and 237 deletions.
diff --git a/bsp/bouffalo_lab/bl808/m0/board/wlan_port/drv_wifi.c b/bsp/bouffalo_lab/bl808/m0/board/wlan_port/drv_wifi.c
@@ -303,7 +303,7 @@ static rt_err_t drv_wlan_softap(struct rt_wlan_device *wlan, struct rt_ap_info *
     }
 
     if (ret < 0)
-        return RT_ERROR;
+        return -RT_ERROR;
 
     return RT_EOK;
 }

diff --git a/bsp/samd21/applications/application.c b/bsp/samd21/applications/application.c
@@ -35,35 +35,35 @@ void extint_detection_callback(void);
 
 void configure_extint_channel(void)
 {
-//! [setup_1]
+/*! [setup_1]*/
     struct extint_chan_conf config_extint_chan;
-//! [setup_1]
-//! [setup_2]
+/*! [setup_1]*/
+/*! [setup_2]*/
     extint_chan_get_config_defaults(&config_extint_chan);
-//! [setup_2]
+/*! [setup_2]*/
 
-//! [setup_3]
+/*! [setup_3]*/
     config_extint_chan.gpio_pin           = PIN_PA15A_EIC_EXTINT15;
     config_extint_chan.gpio_pin_mux       = MUX_PA15A_EIC_EXTINT15;
     config_extint_chan.gpio_pin_pull      = EXTINT_PULL_UP;
     config_extint_chan.detection_criteria = EXTINT_DETECT_BOTH;
-//! [setup_3]
-//! [setup_4]
+/*! [setup_3]*/
+/*! [setup_4]*/
     extint_chan_set_config(15, &config_extint_chan);
-//! [setup_4]
+/*! [setup_4]*/
 }
 
 void configure_extint_callbacks(void)
 {
-//! [setup_5]
+/*! [setup_5]*/
     extint_register_callback(extint_detection_callback, 15, EXTINT_CALLBACK_TYPE_DETECT);
-//! [setup_5]
-//! [setup_6]
+/*! [setup_5]*/
+/*! [setup_6]*/
     extint_chan_enable_callback(15, EXTINT_CALLBACK_TYPE_DETECT);
-//! [setup_6]
+/*! [setup_6]*/
 }
 
-//! [setup_7]
+/*! [setup_7]*/
 void extint_detection_callback(void)
 {
     bool pin_state = port_pin_get_input_level(PIN_PA15);
@@ -97,7 +97,7 @@ void rt_init_thread_entry(void* parameter)
     configure_extint_callbacks();
 
     sleep_timer_init();
-    // sleep_timer_start(1500);
+    /* sleep_timer_start(1500);*/
 
     while (1)
     {

diff --git a/bsp/samd21/board/board.c b/bsp/samd21/board/board.c
@@ -10,91 +10,91 @@
 void SysTick_Handler(void)
 {
     /* enter interrupt */
-	rt_interrupt_enter();
+    rt_interrupt_enter();
 
-	rt_tick_increase();
+    rt_tick_increase();
 
-	/* leave interrupt */
-	rt_interrupt_leave();
+    /* leave interrupt */
+    rt_interrupt_leave();
 }
 
 void configure_extosc32k(void);
 void configure_dfll_open_loop(void);
 
-//! [setup]
-//! [config_extosc32k]
+/*! [setup]*/
+/*! [config_extosc32k]*/
 void configure_extosc32k(void)
 {
-//! [config_extosc32k_config]
-	struct system_clock_source_xosc32k_config config_ext32k;
-//! [config_extosc32k_config]
-//! [config_extosc32k_get_defaults]
-	system_clock_source_xosc32k_get_config_defaults(&config_ext32k);
-//! [config_extosc32k_get_defaults]
-
-//! [config_extosc32k_change_defaults]
-	config_ext32k.startup_time = SYSTEM_XOSC32K_STARTUP_4096;
+/*! [config_extosc32k_config]*/
+    struct system_clock_source_xosc32k_config config_ext32k;
+/*! [config_extosc32k_config]*/
+/*! [config_extosc32k_get_defaults]*/
+    system_clock_source_xosc32k_get_config_defaults(&config_ext32k);
+/*! [config_extosc32k_get_defaults]*/
+
+/*! [config_extosc32k_change_defaults]*/
+    config_ext32k.startup_time = SYSTEM_XOSC32K_STARTUP_4096;
     config_ext32k.on_demand = false;
-//! [config_extosc32k_change_defaults]
+/*! [config_extosc32k_change_defaults]*/
 
-//! [config_extosc32k_set_config]
-	system_clock_source_xosc32k_set_config(&config_ext32k);
-//! [config_extosc32k_set_config]
-	system_clock_source_enable(SYSTEM_CLOCK_SOURCE_XOSC32K);
-	while(!system_clock_source_is_ready(SYSTEM_CLOCK_SOURCE_XOSC32K));
+/*! [config_extosc32k_set_config]*/
+    system_clock_source_xosc32k_set_config(&config_ext32k);
+/*! [config_extosc32k_set_config]*/
+    system_clock_source_enable(SYSTEM_CLOCK_SOURCE_XOSC32K);
+    while(!system_clock_source_is_ready(SYSTEM_CLOCK_SOURCE_XOSC32K));
 }
-//! [config_extosc32k]
+/*! [config_extosc32k]*/
 
 #if (!SAMC21)
-//! [config_dfll]
+/*! [config_dfll]*/
 void configure_dfll_open_loop(void)
 {
-//! [config_dfll_config]
-	struct system_clock_source_dfll_config config_dfll;
-//! [config_dfll_config]
-//! [config_dfll_get_defaults]
-	system_clock_source_dfll_get_config_defaults(&config_dfll);
-//! [config_dfll_get_defaults]
-	config_dfll.coarse_value    = (*((uint8_t*)(0x806020 + 7))) >> 2;// 0x1f / 4; /* Midpoint */
-	config_dfll.fine_value      = (*((uint32_t*)(0x806020 + 8))) & 0x3FF;//0xff / 4; /* Midpoint */
-//! [config_dfll_set_config]
-	system_clock_source_dfll_set_config(&config_dfll);
-//! [config_dfll_set_config]
-
-//! [enable_dfll_main]
-	system_clock_source_enable(SYSTEM_CLOCK_SOURCE_DFLL);
-	// while(!system_clock_source_is_ready(SYSTEM_CLOCK_SOURCE_DFLL));
-
-//! [enable_dfll_main]
-	/* Configure flash wait states before switching to high frequency clock */
-//! [set_sys_wait_states]
-	system_flash_set_waitstates(2);
-//! [set_sys_wait_states]
-
-	/* Change system clock to DFLL */
-//! [set_sys_clk_src]
-	struct system_gclk_gen_config config_gclock_gen;
-	system_gclk_gen_get_config_defaults(&config_gclock_gen);
-	config_gclock_gen.source_clock    = SYSTEM_CLOCK_SOURCE_DFLL;
-	config_gclock_gen.division_factor = 1;
-	system_gclk_gen_set_config(GCLK_GENERATOR_0, &config_gclock_gen);
-//! [set_sys_clk_src]
+/*! [config_dfll_config]*/
+    struct system_clock_source_dfll_config config_dfll;
+/*! [config_dfll_config]*/
+/*! [config_dfll_get_defaults]*/
+    system_clock_source_dfll_get_config_defaults(&config_dfll);
+/*! [config_dfll_get_defaults]*/
+    config_dfll.coarse_value    = (*((uint8_t*)(0x806020 + 7))) >> 2;/* 0x1f / 4; /* Midpoint */
+    config_dfll.fine_value      = (*((uint32_t*)(0x806020 + 8))) & 0x3FF;/*0xff / 4; /* Midpoint */
+/*! [config_dfll_set_config]*/
+    system_clock_source_dfll_set_config(&config_dfll);
+/*! [config_dfll_set_config]*/
+
+/*! [enable_dfll_main]*/
+    system_clock_source_enable(SYSTEM_CLOCK_SOURCE_DFLL);
+    /* while(!system_clock_source_is_ready(SYSTEM_CLOCK_SOURCE_DFLL));*/
+
+/*! [enable_dfll_main]*/
+    /* Configure flash wait states before switching to high frequency clock */
+/*! [set_sys_wait_states]*/
+    system_flash_set_waitstates(2);
+/*! [set_sys_wait_states]*/
+
+    /* Change system clock to DFLL */
+/*! [set_sys_clk_src]*/
+    struct system_gclk_gen_config config_gclock_gen;
+    system_gclk_gen_get_config_defaults(&config_gclock_gen);
+    config_gclock_gen.source_clock    = SYSTEM_CLOCK_SOURCE_DFLL;
+    config_gclock_gen.division_factor = 1;
+    system_gclk_gen_set_config(GCLK_GENERATOR_0, &config_gclock_gen);
+/*! [set_sys_clk_src]*/
 }
-//! [config_dfll]
+/*! [config_dfll]*/
 #endif
 
 void rt_board_init(void)
 {
     extern void uart_init(void);
 
-    // configure_extosc32k();
+    /* configure_extosc32k();*/
 
-    // configure_dfll_open_loop();
-	system_init();
+    /* configure_dfll_open_loop();*/
+    system_init();
 
-	/* initialize systick */
-	SystemCoreClock = system_gclk_gen_get_hz(0);
-	SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
+    /* initialize systick */
+    SystemCoreClock = system_gclk_gen_get_hz(0);
+    SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
 
     uart_init();
     rt_console_set_device(RT_CONSOLE_DEVICE_NAME);