Merge pull request #1543 from SAP/pr-jdk-22+25

Merge to tag jdk-22+25

make/hotspot/lib/CompileJvm.gmk

@@ -88,13 +88,6 @@ DISABLED_WARNINGS_gcc := array-bounds comment delete-non-virtual-dtor \
     maybe-uninitialized missing-field-initializers parentheses \
     shift-negative-value unknown-pragmas
 
-ifeq ($(DEBUG_LEVEL), fastdebug)
-  ifeq ($(call And, $(call isTargetOs, linux) $(call isTargetCpu, aarch64)), true)
-    # False positive warnings for atomic_linux_aarch64.hpp on GCC >= 13
-    DISABLED_WARNINGS_gcc += stringop-overflow
-  endif
-endif
-
 DISABLED_WARNINGS_clang := sometimes-uninitialized \
     missing-braces delete-non-abstract-non-virtual-dtor unknown-pragmas
 
@@ -171,8 +164,12 @@ $(eval $(call SetupJdkLibrary, BUILD_LIBJVM, \
     DISABLED_WARNINGS_gcc_ad_$(HOTSPOT_TARGET_CPU_ARCH).cpp := nonnull, \
     DISABLED_WARNINGS_gcc_cgroupV1Subsystem_linux.cpp := address, \
     DISABLED_WARNINGS_gcc_cgroupV2Subsystem_linux.cpp := address, \
+    DISABLED_WARNINGS_gcc_handshake.cpp := stringop-overflow, \
     DISABLED_WARNINGS_gcc_interp_masm_x86.cpp := uninitialized, \
+    DISABLED_WARNINGS_gcc_jvmciCodeInstaller.cpp := stringop-overflow, \
+    DISABLED_WARNINGS_gcc_jvmtiTagMap.cpp := stringop-overflow, \
     DISABLED_WARNINGS_gcc_postaloc.cpp := address, \
+    DISABLED_WARNINGS_gcc_synchronizer.cpp := stringop-overflow, \
     DISABLED_WARNINGS_clang := $(DISABLED_WARNINGS_clang), \
     DISABLED_WARNINGS_clang_arguments.cpp := missing-field-initializers, \
     DISABLED_WARNINGS_clang_codeBuffer.cpp := tautological-undefined-compare, \

src/hotspot/cpu/aarch64/assembler_aarch64.hpp

@@ -1088,8 +1088,8 @@ class Assembler : public AbstractAssembler {
 #undef INSN
 
   // we only provide mrs and msr for the special purpose system
-  // registers where op1 (instr[20:19]) == 11 and, (currently) only
-  // use it for FPSR n.b msr has L (instr[21]) == 0 mrs has L == 1
+  // registers where op1 (instr[20:19]) == 11
+  // n.b msr has L (instr[21]) == 0 mrs has L == 1
 
   void msr(int op1, int CRn, int CRm, int op2, Register rt) {
     starti;

src/hotspot/cpu/aarch64/c2_CodeStubs_aarch64.cpp

@@ -55,7 +55,7 @@ int C2EntryBarrierStub::max_size() const {
 
 void C2EntryBarrierStub::emit(C2_MacroAssembler& masm) {
   __ bind(entry());
-  __ movptr(rscratch1, (uintptr_t) StubRoutines::aarch64::method_entry_barrier());
+  __ lea(rscratch1, RuntimeAddress(StubRoutines::method_entry_barrier()));
   __ blr(rscratch1);
   __ b(continuation());
 

src/hotspot/cpu/aarch64/frame_aarch64.hpp

@@ -93,7 +93,7 @@
     // Entry frames
     // n.b. these values are determined by the layout defined in
     // stubGenerator for the Java call stub
-    entry_frame_after_call_words                     = 27,
+    entry_frame_after_call_words                     = 29,
     entry_frame_call_wrapper_offset                  = -8,
 
     // we don't need a save area

src/hotspot/cpu/aarch64/gc/shared/barrierSetAssembler_aarch64.cpp

@@ -358,7 +358,7 @@ void BarrierSetAssembler::nmethod_entry_barrier(MacroAssembler* masm, Label* slo
   __ br(condition, barrier_target);
 
   if (slow_path == nullptr) {
-    __ movptr(rscratch1, (uintptr_t) StubRoutines::aarch64::method_entry_barrier());
+    __ lea(rscratch1, RuntimeAddress(StubRoutines::method_entry_barrier()));
     __ blr(rscratch1);
     __ b(skip_barrier);
 

src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp

@@ -571,6 +571,19 @@ class MacroAssembler: public Assembler {
     msr(0b011, 0b0100, 0b0100, 0b001, zr);
   }
 
+  // FPCR : op1 == 011
+  //        CRn == 0100
+  //        CRm == 0100
+  //        op2 == 000
+
+  inline void get_fpcr(Register reg) {
+    mrs(0b11, 0b0100, 0b0100, 0b000, reg);
+  }
+
+  inline void set_fpcr(Register reg) {
+    msr(0b011, 0b0100, 0b0100, 0b000, reg);
+  }
+
   // DCZID_EL0: op1 == 011
   //            CRn == 0000
   //            CRm == 0000

src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp

@@ -801,9 +801,7 @@ AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm
 
 static int c_calling_convention_priv(const BasicType *sig_bt,
                                          VMRegPair *regs,
-                                         VMRegPair *regs2,
                                          int total_args_passed) {
-  assert(regs2 == nullptr, "not needed on AArch64");
 
 // We return the amount of VMRegImpl stack slots we need to reserve for all
 // the arguments NOT counting out_preserve_stack_slots.
@@ -897,10 +895,9 @@ int SharedRuntime::vector_calling_convention(VMRegPair *regs,
 
 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
                                          VMRegPair *regs,
-                                         VMRegPair *regs2,
                                          int total_args_passed)
 {
-  int result = c_calling_convention_priv(sig_bt, regs, regs2, total_args_passed);
+  int result = c_calling_convention_priv(sig_bt, regs, total_args_passed);
   guarantee(result >= 0, "Unsupported arguments configuration");
   return result;
 }
@@ -1457,7 +1454,7 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
   // Now figure out where the args must be stored and how much stack space
   // they require.
   int out_arg_slots;
-  out_arg_slots = c_calling_convention_priv(out_sig_bt, out_regs, nullptr, total_c_args);
+  out_arg_slots = c_calling_convention_priv(out_sig_bt, out_regs, total_c_args);
 
   if (out_arg_slots < 0) {
     return nullptr;

src/hotspot/cpu/aarch64/stubGenerator_aarch64.cpp

@@ -141,7 +141,8 @@ class StubGenerator: public StubCodeGenerator {
   //     [ return_from_Java     ] <--- sp
   //     [ argument word n      ]
   //      ...
-  // -27 [ argument word 1      ]
+  // -29 [ argument word 1      ]
+  // -28 [ saved Floating-point Control Register ]
   // -26 [ saved v15            ] <--- sp_after_call
   // -25 [ saved v14            ]
   // -24 [ saved v13            ]
@@ -173,8 +174,9 @@ class StubGenerator: public StubCodeGenerator {
 
   // Call stub stack layout word offsets from fp
   enum call_stub_layout {
-    sp_after_call_off = -26,
+    sp_after_call_off  = -28,
 
+    fpcr_off           = sp_after_call_off,
     d15_off            = -26,
     d13_off            = -24,
     d11_off            = -22,
@@ -204,8 +206,9 @@ class StubGenerator: public StubCodeGenerator {
     StubCodeMark mark(this, "StubRoutines", "call_stub");
     address start = __ pc();
 
-    const Address sp_after_call(rfp, sp_after_call_off * wordSize);
+    const Address sp_after_call (rfp, sp_after_call_off * wordSize);
 
+    const Address fpcr_save     (rfp, fpcr_off           * wordSize);
     const Address call_wrapper  (rfp, call_wrapper_off   * wordSize);
     const Address result        (rfp, result_off         * wordSize);
     const Address result_type   (rfp, result_type_off    * wordSize);
@@ -254,6 +257,14 @@ class StubGenerator: public StubCodeGenerator {
     __ stpd(v13, v12,  d13_save);
     __ stpd(v15, v14,  d15_save);
 
+    __ get_fpcr(rscratch1);
+    __ str(rscratch1, fpcr_save);
+    // Set FPCR to the state we need. We do want Round to Nearest. We
+    // don't want non-IEEE rounding modes or floating-point traps.
+    __ bfi(rscratch1, zr, 22, 4); // Clear DN, FZ, and Rmode
+    __ bfi(rscratch1, zr, 8, 5);  // Clear exception-control bits (8-12)
+    __ set_fpcr(rscratch1);
+
     // install Java thread in global register now we have saved
     // whatever value it held
     __ mov(rthread, c_rarg7);
@@ -367,6 +378,10 @@ class StubGenerator: public StubCodeGenerator {
     __ ldp(r22, r21,   r22_save);
     __ ldp(r20, r19,   r20_save);
 
+    // restore fpcr
+    __ ldr(rscratch1,  fpcr_save);
+    __ set_fpcr(rscratch1);
+
     __ ldp(c_rarg0, c_rarg1,  call_wrapper);
     __ ldrw(c_rarg2, result_type);
     __ ldr(c_rarg3,  method);
@@ -8378,7 +8393,7 @@ class StubGenerator: public StubCodeGenerator {
 
     BarrierSetNMethod* bs_nm = BarrierSet::barrier_set()->barrier_set_nmethod();
     if (bs_nm != nullptr) {
-      StubRoutines::aarch64::_method_entry_barrier = generate_method_entry_barrier();
+      StubRoutines::_method_entry_barrier = generate_method_entry_barrier();
     }
 
     StubRoutines::aarch64::_spin_wait = generate_spin_wait();

src/hotspot/cpu/aarch64/stubRoutines_aarch64.cpp

@@ -56,7 +56,6 @@ address StubRoutines::aarch64::_string_indexof_linear_ll = nullptr;
 address StubRoutines::aarch64::_string_indexof_linear_uu = nullptr;
 address StubRoutines::aarch64::_string_indexof_linear_ul = nullptr;
 address StubRoutines::aarch64::_large_byte_array_inflate = nullptr;
-address StubRoutines::aarch64::_method_entry_barrier = nullptr;
 
 static void empty_spin_wait() { }
 address StubRoutines::aarch64::_spin_wait = CAST_FROM_FN_PTR(address, empty_spin_wait);

src/hotspot/cpu/aarch64/stubRoutines_aarch64.hpp

@@ -71,8 +71,6 @@ class aarch64 {
   static address _string_indexof_linear_ul;
   static address _large_byte_array_inflate;
 
-  static address _method_entry_barrier;
-
   static address _spin_wait;
 
   static bool _completed;
@@ -179,10 +177,6 @@ class aarch64 {
       return _large_byte_array_inflate;
   }
 
-  static address method_entry_barrier() {
-    return _method_entry_barrier;
-  }
-
   static address spin_wait() {
     return _spin_wait;
   }

src/hotspot/cpu/arm/gc/shared/barrierSetAssembler_arm.cpp

@@ -227,7 +227,7 @@ void BarrierSetAssembler::nmethod_entry_barrier(MacroAssembler* masm) {
   __ cmp(tmp0, tmp1);
   __ b(skip, eq);
 
-  __ mov_address(tmp0, StubRoutines::Arm::method_entry_barrier());
+  __ mov_address(tmp0, StubRoutines::method_entry_barrier());
   __ call(tmp0);
   __ b(skip);
 

src/hotspot/cpu/arm/interp_masm_arm.cpp

@@ -39,6 +39,7 @@
 #include "oops/methodData.hpp"
 #include "oops/resolvedFieldEntry.hpp"
 #include "oops/resolvedIndyEntry.hpp"
+#include "oops/resolvedMethodEntry.hpp"
 #include "prims/jvmtiExport.hpp"
 #include "prims/jvmtiThreadState.hpp"
 #include "runtime/basicLock.hpp"
@@ -222,48 +223,6 @@ void InterpreterMacroAssembler::get_index_at_bcp(Register index, int bcp_offset,
   }
 }
 
-// Sets cache, index.
-void InterpreterMacroAssembler::get_cache_and_index_at_bcp(Register cache, Register index, int bcp_offset, size_t index_size) {
-  assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
-  assert_different_registers(cache, index);
-
-  get_index_at_bcp(index, bcp_offset, cache, index_size);
-
-  // load constant pool cache pointer
-  ldr(cache, Address(FP, frame::interpreter_frame_cache_offset * wordSize));
-
-  // convert from field index to ConstantPoolCacheEntry index
-  assert(sizeof(ConstantPoolCacheEntry) == 4*wordSize, "adjust code below");
-  logical_shift_left(index, index, 2);
-}
-
-// Sets cache, index, bytecode.
-void InterpreterMacroAssembler::get_cache_and_index_and_bytecode_at_bcp(Register cache, Register index, Register bytecode, int byte_no, int bcp_offset, size_t index_size) {
-  get_cache_and_index_at_bcp(cache, index, bcp_offset, index_size);
-  // caution index and bytecode can be the same
-  add(bytecode, cache, AsmOperand(index, lsl, LogBytesPerWord));
-  ldrb(bytecode, Address(bytecode, (1 + byte_no) + in_bytes(ConstantPoolCache::base_offset() + ConstantPoolCacheEntry::indices_offset())));
-  TemplateTable::volatile_barrier(MacroAssembler::LoadLoad, noreg, true);
-}
-
-// Sets cache. Blows reg_tmp.
-void InterpreterMacroAssembler::get_cache_entry_pointer_at_bcp(Register cache, Register reg_tmp, int bcp_offset, size_t index_size) {
-  assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
-  assert_different_registers(cache, reg_tmp);
-
-  get_index_at_bcp(reg_tmp, bcp_offset, cache, index_size);
-
-  // load constant pool cache pointer
-  ldr(cache, Address(FP, frame::interpreter_frame_cache_offset * wordSize));
-
-  // skip past the header
-  add(cache, cache, in_bytes(ConstantPoolCache::base_offset()));
-  // convert from field index to ConstantPoolCacheEntry index
-  // and from word offset to byte offset
-  assert(sizeof(ConstantPoolCacheEntry) == 4*wordSize, "adjust code below");
-  add(cache, cache, AsmOperand(reg_tmp, lsl, 2 + LogBytesPerWord));
-}
-
 // Load object from cpool->resolved_references(index)
 void InterpreterMacroAssembler::load_resolved_reference_at_index(
                                            Register result, Register index) {
@@ -343,6 +302,20 @@ void InterpreterMacroAssembler::load_field_entry(Register cache, Register index,
   }
 }
 
+void InterpreterMacroAssembler::load_method_entry(Register cache, Register index, int bcp_offset) {
+  // Get index out of bytecode pointer
+  get_index_at_bcp(index, bcp_offset, cache /* as tmp */, sizeof(u2));
+  mov(cache, sizeof(ResolvedMethodEntry));
+  mul(index, index, cache); // Scale the index to be the entry index * sizeof(ResolvedMethodEntry)
+
+  // load constant pool cache pointer
+  ldr(cache, Address(FP, frame::interpreter_frame_cache_offset * wordSize));
+  // Get address of method entries array
+  ldr(cache, Address(cache, ConstantPoolCache::method_entries_offset()));
+  add(cache, cache, Array<ResolvedMethodEntry>::base_offset_in_bytes());
+  add(cache, cache, index);
+}
+
 // Generate a subtype check: branch to not_subtype if sub_klass is
 // not a subtype of super_klass.
 // Profiling code for the subtype check failure (profile_typecheck_failed)

src/hotspot/cpu/arm/interp_masm_arm.hpp

@@ -89,11 +89,6 @@ class InterpreterMacroAssembler: public MacroAssembler {
 
   // Sets index. Blows reg_tmp.
   void get_index_at_bcp(Register index, int bcp_offset, Register reg_tmp, size_t index_size = sizeof(u2));
-  // Sets cache, index.
-  void get_cache_and_index_at_bcp(Register cache, Register index, int bcp_offset, size_t index_size = sizeof(u2));
-  void get_cache_and_index_and_bytecode_at_bcp(Register cache, Register index, Register bytecode, int byte_no, int bcp_offset, size_t index_size = sizeof(u2));
-  // Sets cache. Blows reg_tmp.
-  void get_cache_entry_pointer_at_bcp(Register cache, Register reg_tmp, int bcp_offset, size_t index_size = sizeof(u2));
 
   // Load object from cpool->resolved_references(*bcp+1)
   void load_resolved_reference_at_index(Register result, Register tmp);
@@ -103,6 +98,7 @@ class InterpreterMacroAssembler: public MacroAssembler {
 
   void load_resolved_indy_entry(Register cache, Register index);
   void load_field_entry(Register cache, Register index, int bcp_offset = 1);
+  void load_method_entry(Register cache, Register index, int bcp_offset = 1);
 
   void pop_ptr(Register r);
   void pop_i(Register r = R0_tos);

src/hotspot/cpu/arm/sharedRuntime_arm.cpp

@@ -254,10 +254,7 @@ bool SharedRuntime::is_wide_vector(int size) {
 
 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
                                         VMRegPair *regs,
-                                        VMRegPair *regs2,
                                         int total_args_passed) {
-  assert(regs2 == nullptr, "not needed on arm");
-
   int slot = 0;
   int ireg = 0;
 #ifdef __ABI_HARD__
@@ -795,7 +792,7 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
     out_sig_bt[argc++] = in_sig_bt[i];
   }
 
-  int out_arg_slots = c_calling_convention(out_sig_bt, out_regs, nullptr, total_c_args);
+  int out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
   int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
   // Since object arguments need to be wrapped, we must preserve space
   // for those object arguments which come in registers (GPR_PARAMS maximum)

src/hotspot/cpu/arm/stubGenerator_arm.cpp

@@ -3188,7 +3188,7 @@ class StubGenerator: public StubCodeGenerator {
 
     BarrierSetNMethod* bs_nm = BarrierSet::barrier_set()->barrier_set_nmethod();
     if (bs_nm != nullptr) {
-      StubRoutines::Arm::_method_entry_barrier = generate_method_entry_barrier();
+      StubRoutines::_method_entry_barrier = generate_method_entry_barrier();
     }
 
   }

src/hotspot/cpu/arm/stubRoutines_arm.cpp

@@ -33,5 +33,3 @@ address StubRoutines::Arm::_partial_subtype_check = nullptr;
 
 address StubRoutines::_atomic_load_long_entry = nullptr;
 address StubRoutines::_atomic_store_long_entry = nullptr;
-
-address StubRoutines::Arm::_method_entry_barrier = nullptr;

src/hotspot/cpu/arm/stubRoutines_arm.hpp

@@ -45,13 +45,11 @@ class Arm {
 
   static address _idiv_irem_entry;
   static address _partial_subtype_check;
-  static address _method_entry_barrier;
 
  public:
 
   static address idiv_irem_entry() { return _idiv_irem_entry; }
   static address partial_subtype_check() { return _partial_subtype_check; }
-  static address method_entry_barrier() { return _method_entry_barrier; }
 };
 
   static bool returns_to_call_stub(address return_pc) {

src/hotspot/cpu/arm/templateInterpreterGenerator_arm.cpp

@@ -37,6 +37,7 @@
 #include "oops/method.inline.hpp"
 #include "oops/oop.inline.hpp"
 #include "oops/resolvedIndyEntry.hpp"
+#include "oops/resolvedMethodEntry.hpp"
 #include "prims/jvmtiExport.hpp"
 #include "prims/jvmtiThreadState.hpp"
 #include "prims/methodHandles.hpp"
@@ -373,12 +374,11 @@ address TemplateInterpreterGenerator::generate_return_entry_for(TosState state,
     __ add(Rstack_top, Rstack_top, AsmOperand(Rcache, lsl, Interpreter::logStackElementSize));
   } else {
     // Pop N words from the stack
-    __ get_cache_and_index_at_bcp(Rcache, Rindex, 1, index_size);
-
-    __ add(Rtemp, Rcache, AsmOperand(Rindex, lsl, LogBytesPerWord));
-    __ ldrb(Rtemp, Address(Rtemp, ConstantPoolCache::base_offset() + ConstantPoolCacheEntry::flags_offset()));
+    assert(index_size == sizeof(u2), "Can only be u2");
+    __ load_method_entry(Rcache, Rindex);
+    __ ldrh(Rcache, Address(Rcache, in_bytes(ResolvedIndyEntry::num_parameters_offset())));
     __ check_stack_top();
-    __ add(Rstack_top, Rstack_top, AsmOperand(Rtemp, lsl, Interpreter::logStackElementSize));
+    __ add(Rstack_top, Rstack_top, AsmOperand(Rcache, lsl, Interpreter::logStackElementSize));
   }
 
   __ convert_retval_to_tos(state);