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8301997: Move method resolution information out of the cpCache
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Co-authored-by: Gui Cao <[email protected]>
Co-authored-by: Fei Yang <[email protected]>
Co-authored-by: Martin Doerr <[email protected]>
Co-authored-by: Amit Kumar <[email protected]>
Reviewed-by: coleenp, adinn, fparain
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5 people committed Nov 15, 2023
1 parent 891d8cf commit ffa35d8
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Showing 79 changed files with 2,034 additions and 2,745 deletions.
83 changes: 13 additions & 70 deletions src/hotspot/cpu/aarch64/interp_masm_aarch64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -38,6 +38,7 @@
#include "oops/methodData.hpp"
#include "oops/resolvedFieldEntry.hpp"
#include "oops/resolvedIndyEntry.hpp"
#include "oops/resolvedMethodEntry.hpp"
#include "prims/jvmtiExport.hpp"
#include "prims/jvmtiThreadState.hpp"
#include "runtime/basicLock.hpp"
Expand Down Expand Up @@ -201,64 +202,6 @@ void InterpreterMacroAssembler::get_cache_index_at_bcp(Register index,
}
}

// Return
// Rindex: index into constant pool
// Rcache: address of cache entry - ConstantPoolCache::base_offset()
//
// A caller must add ConstantPoolCache::base_offset() to Rcache to get
// the true address of the cache entry.
//
void InterpreterMacroAssembler::get_cache_and_index_at_bcp(Register cache,
Register index,
int bcp_offset,
size_t index_size) {
assert_different_registers(cache, index);
assert_different_registers(cache, rcpool);
get_cache_index_at_bcp(index, bcp_offset, index_size);
assert(sizeof(ConstantPoolCacheEntry) == 4 * wordSize, "adjust code below");
// convert from field index to ConstantPoolCacheEntry
// aarch64 already has the cache in rcpool so there is no need to
// install it in cache. instead we pre-add the indexed offset to
// rcpool and return it in cache. All clients of this method need to
// be modified accordingly.
add(cache, rcpool, index, Assembler::LSL, 5);
}


void InterpreterMacroAssembler::get_cache_and_index_and_bytecode_at_bcp(Register cache,
Register index,
Register bytecode,
int byte_no,
int bcp_offset,
size_t index_size) {
get_cache_and_index_at_bcp(cache, index, bcp_offset, index_size);
// We use a 32-bit load here since the layout of 64-bit words on
// little-endian machines allow us that.
// n.b. unlike x86 cache already includes the index offset
lea(bytecode, Address(cache,
ConstantPoolCache::base_offset()
+ ConstantPoolCacheEntry::indices_offset()));
ldarw(bytecode, bytecode);
const int shift_count = (1 + byte_no) * BitsPerByte;
ubfx(bytecode, bytecode, shift_count, BitsPerByte);
}

void InterpreterMacroAssembler::get_cache_entry_pointer_at_bcp(Register cache,
Register tmp,
int bcp_offset,
size_t index_size) {
assert(cache != tmp, "must use different register");
get_cache_index_at_bcp(tmp, bcp_offset, index_size);
assert(sizeof(ConstantPoolCacheEntry) == 4 * wordSize, "adjust code below");
// convert from field index to ConstantPoolCacheEntry index
// and from word offset to byte offset
assert(exact_log2(in_bytes(ConstantPoolCacheEntry::size_in_bytes())) == 2 + LogBytesPerWord, "else change next line");
ldr(cache, Address(rfp, frame::interpreter_frame_cache_offset * wordSize));
// skip past the header
add(cache, cache, in_bytes(ConstantPoolCache::base_offset()));
add(cache, cache, tmp, Assembler::LSL, 2 + LogBytesPerWord); // construct pointer to cache entry
}

void InterpreterMacroAssembler::get_method_counters(Register method,
Register mcs, Label& skip) {
Label has_counters;
Expand Down Expand Up @@ -295,18 +238,6 @@ void InterpreterMacroAssembler::load_resolved_klass_at_offset(
ldr(klass, Address(klass, Array<Klass*>::base_offset_in_bytes()));
}

void InterpreterMacroAssembler::load_resolved_method_at_index(int byte_no,
Register method,
Register cache) {
const int method_offset = in_bytes(
ConstantPoolCache::base_offset() +
((byte_no == TemplateTable::f2_byte)
? ConstantPoolCacheEntry::f2_offset()
: ConstantPoolCacheEntry::f1_offset()));

ldr(method, Address(cache, method_offset)); // get f1 Method*
}

// Generate a subtype check: branch to ok_is_subtype if sub_klass is a
// subtype of super_klass.
//
Expand Down Expand Up @@ -1866,3 +1797,15 @@ void InterpreterMacroAssembler::load_field_entry(Register cache, Register index,
add(cache, cache, Array<ResolvedFieldEntry>::base_offset_in_bytes());
lea(cache, Address(cache, index));
}

void InterpreterMacroAssembler::load_method_entry(Register cache, Register index, int bcp_offset) {
// Get index out of bytecode pointer
get_cache_index_at_bcp(index, bcp_offset, sizeof(u2));
mov(cache, sizeof(ResolvedMethodEntry));
mul(index, index, cache); // Scale the index to be the entry index * sizeof(ResolvedMethodEntry)

// Get address of field entries array
ldr(cache, Address(rcpool, ConstantPoolCache::method_entries_offset()));
add(cache, cache, Array<ResolvedMethodEntry>::base_offset_in_bytes());
lea(cache, Address(cache, index));
}
6 changes: 1 addition & 5 deletions src/hotspot/cpu/aarch64/interp_masm_aarch64.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -140,9 +140,6 @@ class InterpreterMacroAssembler: public MacroAssembler {
}

void get_unsigned_2_byte_index_at_bcp(Register reg, int bcp_offset);
void get_cache_and_index_at_bcp(Register cache, Register index, int bcp_offset, size_t index_size = sizeof(u2));
void get_cache_and_index_and_bytecode_at_bcp(Register cache, Register index, Register bytecode, int byte_no, int bcp_offset, size_t index_size = sizeof(u2));
void get_cache_entry_pointer_at_bcp(Register cache, Register tmp, int bcp_offset, size_t index_size = sizeof(u2));
void get_cache_index_at_bcp(Register index, int bcp_offset, size_t index_size = sizeof(u2));
void get_method_counters(Register method, Register mcs, Label& skip);

Expand All @@ -152,8 +149,6 @@ class InterpreterMacroAssembler: public MacroAssembler {
// load cpool->resolved_klass_at(index);
void load_resolved_klass_at_offset(Register cpool, Register index, Register klass, Register temp);

void load_resolved_method_at_index(int byte_no, Register method, Register cache);

void pop_ptr(Register r = r0);
void pop_i(Register r = r0);
void pop_l(Register r = r0);
Expand Down Expand Up @@ -324,6 +319,7 @@ class InterpreterMacroAssembler: public MacroAssembler {

void load_resolved_indy_entry(Register cache, Register index);
void load_field_entry(Register cache, Register index, int bcp_offset = 1);
void load_method_entry(Register cache, Register index, int bcp_offset = 1);
};

#endif // CPU_AARCH64_INTERP_MASM_AARCH64_HPP
Original file line number Diff line number Diff line change
Expand Up @@ -42,6 +42,7 @@
#include "oops/methodData.hpp"
#include "oops/oop.inline.hpp"
#include "oops/resolvedIndyEntry.hpp"
#include "oops/resolvedMethodEntry.hpp"
#include "prims/jvmtiExport.hpp"
#include "prims/jvmtiThreadState.hpp"
#include "runtime/arguments.hpp"
Expand Down Expand Up @@ -493,10 +494,9 @@ address TemplateInterpreterGenerator::generate_return_entry_for(TosState state,
__ add(esp, esp, cache, Assembler::LSL, 3);
} else {
// Pop N words from the stack
__ get_cache_and_index_at_bcp(cache, index, 1, index_size);
__ ldr(cache, Address(cache, ConstantPoolCache::base_offset() + ConstantPoolCacheEntry::flags_offset()));
__ andr(cache, cache, ConstantPoolCacheEntry::parameter_size_mask);

assert(index_size == sizeof(u2), "Can only be u2");
__ load_method_entry(cache, index);
__ load_unsigned_short(cache, Address(cache, in_bytes(ResolvedMethodEntry::num_parameters_offset())));
__ add(esp, esp, cache, Assembler::LSL, 3);
}

Expand Down
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