edit system_W7500.c / h

Wiznet · Nov 20, 2017 · 97b8c1e · 97b8c1e
1 parent 38e99bf
commit 97b8c1e
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Showing 2 changed files with 17 additions and 1 deletion.
diff --git a/W7500P_FW/Libraries/CMSIS/Device/WIZnet/W7500/Include/system_W7500x.h b/W7500P_FW/Libraries/CMSIS/Device/WIZnet/W7500/Include/system_W7500x.h
@@ -39,6 +39,7 @@ extern "C" {
 #include "W7500x.h"
 
 extern uint32_t SystemCoreClock;     /*!< System Clock Frequency (Core Clock)  */
+extern uint32_t SystemFrequency;     /*!< System Clock Frequency (Core Clock)  */    
 extern uint32_t GetSystemClock(void);    /*!< Get System Clock Frequency */
 
 

diff --git a/W7500P_FW/Libraries/CMSIS/Device/WIZnet/W7500/Source/system_W7500x.c b/W7500P_FW/Libraries/CMSIS/Device/WIZnet/W7500/Source/system_W7500x.c
@@ -51,7 +51,22 @@ uint32_t SystemCoreClock = 0;    /*!< Processor Clock Frequency            */
  *----------------------------------------------------------------------------*/
 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
 {
-  //SystemCoreClock = XTAL;
+    uint8_t M,N,OD;
+
+#ifdef SYSCLK_EXTERN_OSC
+    CRG->PLL_IFSR = CRG_PLL_IFSR_OCLK;
+#else
+    CRG->PLL_IFSR = CRG_PLL_IFSR_RCLK;
+#endif    
+    OD = (1 << (CRG->PLL_FCR & 0x01)) * (1 << ((CRG->PLL_FCR & 0x02) >> 1));
+    N = (CRG->PLL_FCR >>  8 ) & 0x3F;
+    M = (CRG->PLL_FCR >> 16) & 0x3F;
+
+#ifdef SYSCLK_EXTERN_OSC
+    SystemCoreClock = EXTERN_XTAL * M / N * 1 / OD;
+#else
+    SystemCoreClock = INTERN_XTAL * M / N * 1 / OD;
+#endif
 }
 
 uint32_t GetSystemClock()