Merge remote-tracking branch 'upstream/master' into tieoff_modinst_ports

Xilinx · Sep 21, 2023 · 143a4fa · 143a4fa
2 parents c288051 + 106bf48
commit 143a4fa
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Showing 4 changed files with 56 additions and 3 deletions.
diff --git a/src/com/xilinx/rapidwright/edif/EDIFNetlist.java b/src/com/xilinx/rapidwright/edif/EDIFNetlist.java
@@ -1652,7 +1652,14 @@ public void expandMacroUnisims(Series series) {
             }
             // Add copy to prim library to avoid destructive changes when collapsed
             // Needs to be a deep copy because it may have child instances that will get updated
-            new EDIFCell(netlistPrims, toAdd, cellName);
+            EDIFCell deepCopy = new EDIFCell(netlistPrims, toAdd, cellName);
+            for (EDIFCellInst inst : deepCopy.getCellInsts()) {
+                EDIFCell child = netlistPrims.getCell(inst.getCellName());
+                if (child == null) {
+                    EDIFCell childCopy = new EDIFCell(netlistPrims, inst.getCellType(), inst.getCellType().getName());
+                    inst.setCellType(childCopy);
+                }
+            }
         }
 
         // Update all cell references to macro versions

diff --git a/src/com/xilinx/rapidwright/router/UltraScaleClockRouting.java b/src/com/xilinx/rapidwright/router/UltraScaleClockRouting.java
@@ -117,6 +117,11 @@ public static RouteNode routeToCentroid(Net clk, RouteNode startingRouteNode, Cl
             for (Wire w : curr.getWireConnections()) {
                 RouteNode parent = curr.getParent();
                 if (parent != null) {
+                    if (parent.getIntentCode() == IntentCode.NODE_GLOBAL_VROUTE &&
+                            w.getIntentCode() == IntentCode.NODE_GLOBAL_HROUTE) {
+                        // Disallow ability to go from VROUTE back to HROUTE
+                        continue;
+                    }
                     if (w.getIntentCode()     == IntentCode.NODE_GLOBAL_VDISTR &&
                        curr.getIntentCode()   == IntentCode.NODE_GLOBAL_VROUTE &&
                        parent.getIntentCode() == IntentCode.NODE_GLOBAL_VROUTE &&

diff --git a/src/com/xilinx/rapidwright/rwroute/RWRoute.java b/src/com/xilinx/rapidwright/rwroute/RWRoute.java
@@ -836,9 +836,10 @@ protected void postRouteProcess() {
                 Net net = e.getKey();
                 SitePinInst source = net.getSource();
                 SitePinInst altSource = net.getAlternateSource();
+                boolean altSourcePreviouslyRouted = altSource != null ? altSource.isRouted() : false;
                 for (SitePinInst spi : Arrays.asList(source, altSource)) {
                     if (spi != null) {
-                        source.setRouted(false);
+                        spi.setRouted(false);
                     }
                 }
 
@@ -876,6 +877,17 @@ protected void postRouteProcess() {
                         break;
                     }
                 }
+                // If the alt source was previously routed, and is no longer, let's remove it
+                if (altSource != null && altSourcePreviouslyRouted && !altSource.isRouted()) {
+                    boolean sourceRouted = source.isRouted();
+                    altSource.getSiteInst().removePin(altSource);
+                    net.removePin(altSource);
+                    source.setRouted(sourceRouted);
+                    if (altSource.getName().endsWith("_O") && source.getName().endsWith("MUX") && source.isRouted()) {
+                        // Add site routing back if we are keeping the MUX pin
+                        source.getSiteInst().routeIntraSiteNet(net, altSource.getBELPin(), altSource.getBELPin());
+                    }
+                }
             }
         }
     }
@@ -1402,11 +1414,15 @@ private boolean saveRouting(Connection connection, RouteNode rnode) {
 
         RouteNode sourceRnode = rnodes.get(rnodes.size()-1);
         if (!sourceRnode.equals(connection.getSourceRnode())) {
+            if (!sourceRnode.equals(connection.getAltSourceRnode())) {
+                // Didn't backtrack to alternate source either -- invalid routing
+                return false;
+            }
+
             // Used source node is different to the one set on the connection
             Net net = connection.getNetWrapper().getNet();
 
             // Update connection's source SPI
-            assert(sourceRnode.equals(connection.getAltSourceRnode()));
             if (connection.getSource() == net.getSource()) {
                 // Swap to alternate source
                 connection.setSource(net.getAlternateSource());

diff --git a/test/src/com/xilinx/rapidwright/edif/TestEDIFHierPortInst.java b/test/src/com/xilinx/rapidwright/edif/TestEDIFHierPortInst.java
@@ -26,6 +26,8 @@
 import com.xilinx.rapidwright.design.Design;
 import com.xilinx.rapidwright.design.Unisim;
 import com.xilinx.rapidwright.device.Device;
+import com.xilinx.rapidwright.device.Series;
+
 import org.junit.jupiter.api.Assertions;
 import org.junit.jupiter.api.Test;
 
@@ -46,4 +48,27 @@ void testGetPhysicalCell() {
         // Check that we can still find it in this case
         Assertions.assertEquals(c, ehpi.getPhysicalCell(d));
     }
+
+    @Test
+    public void testGetPhysicalCellMacroHierarchy() {
+        Design design = new Design("design", "xcvc1902-vsvd1760-2MP-e-S");
+        EDIFNetlist n = design.getNetlist();
+
+        EDIFCell macro = n.getHDIPrimitive(Unisim.RAM64X1D);
+        Assertions.assertSame(n.getHDIPrimitivesLibrary(), macro.getLibrary());
+        n.getTopCell().createChildCellInst("inst", macro);
+        n.expandMacroUnisims(Series.Versal);
+
+        String cellName = "inst/DP/RAMD64_INST";
+
+        // We can't instantiate RAM64X1D since it's a transformed prim, so we'll update
+        // the type after creation
+        Cell c = design.createAndPlaceCell(cellName, Unisim.LUT6, "SLICE_X235Y138/B6LUT");
+        c.setType(Unisim.RAM64X1D.toString());
+
+        EDIFHierCellInst leafInst = n.getHierCellInstFromName("inst/DP/RAMD64_INST");
+
+        EDIFHierPortInst portInst = new EDIFHierPortInst(leafInst.getParent(), leafInst.getInst().getPortInst("O"));
+        Assertions.assertEquals(c, portInst.getPhysicalCell(design));
+    }
 }