Merge pull request #261 from Xilinx/hamza.fix.ex

[AIE2P] Fix EX sub register indices
Xilinx · Jan 14, 2025 · 062ff89 · 062ff89
2 parents 685e83f + 6521065
commit 062ff89
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Showing 4 changed files with 13 additions and 13 deletions.
diff --git a/llvm/lib/Target/AIE/aie2p/AIE2PRegisterInfo.td b/llvm/lib/Target/AIE/aie2p/AIE2PRegisterInfo.td
@@ -58,8 +58,8 @@ def sub_hi_exp : SubRegIndex<32, 32>;
 def sub_bfp_exp : SubRegIndex<32,   0>;
 def sub_bfp_vec : SubRegIndex<256, 32>;
 
-def sub_bfp288_lo : SubRegIndex<288,   0>;
-def sub_bfp288_hi : SubRegIndex<576, 288>;
+def sub_bfp16_e : SubRegIndex<576,   512>;
+def sub_bfp16_x : SubRegIndex<512, 0>;
 
 def sub_bfp576_lo : SubRegIndex<576,   0>;
 def sub_bfp576_hi : SubRegIndex<576, 576>;
@@ -823,9 +823,9 @@ class AIE2PDim3DRegisterClass <dag reglist, RegAltNameIndex idx = NoRegAltName>
   // 576-bit vector-exponent registers
   // These consist of two 288-bit vector-exponent registers
   foreach i = 0 - 5 in {
-    let SubRegIndices = [sub_bfp288_lo, sub_bfp288_hi], CoveredBySubRegs = 1 in {
-      def ex #!mul(i,2) : AIE2P3BitReg<i, "ex" #!mul(i,2), [!cast<Register>("ewl" #!mul(i,2)), !cast<Register>("ewh" #!mul(i,2))]>;
-      def ex #!add(!mul(i,2),1) : AIE2P3BitReg<i, "ex" #!add(!mul(i,2),1), [!cast<Register>("ewl" #!add(!mul(i,2),1)), !cast<Register>("ewh" #!add(!mul(i,2),1))]>;
+    let SubRegIndices = [sub_bfp16_x, sub_bfp16_e], CoveredBySubRegs = 1 in {
+      def ex #!mul(i,2) : AIE2P3BitReg<i, "ex" #!mul(i,2), [!cast<Register>("x" #!mul(i,2)), !cast<Register>("e" #!mul(i,2))]>;
+      def ex #!add(!mul(i,2),1) : AIE2P3BitReg<i, "ex" #!add(!mul(i,2),1), [!cast<Register>("x" #!add(!mul(i,2),1)), !cast<Register>("e" #!add(!mul(i,2),1))]>;
     }
   }
   class AIE2PVector576RegisterClass<dag reglist, RegAltNameIndex idx = NoRegAltName>

diff --git a/llvm/test/CodeGen/AIE/aie2p/ra/split-instrs-replace.mir b/llvm/test/CodeGen/AIE/aie2p/ra/split-instrs-replace.mir
@@ -118,7 +118,7 @@ body:             |
   ; CHECK-NEXT:   renamable $dc4 = COPY killed renamable $r2
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.3:
-  ; CHECK-NEXT:   liveins: $dc0, $dc4, $dj0, $dj4, $dn0, $dn4, $m0, $p0, $d0_3d:0x001C000000800E00
+  ; CHECK-NEXT:   liveins: $dc0, $dc4, $dj0, $dj4, $dn0, $dn4, $m0, $p0, $d0_3d:0x0007000000800E00
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT:   $p0, $dc0, $dc4 = PADDA_3D killed $p0, $d0_3d
   ; CHECK-NEXT:   PseudoRET implicit $lr, implicit killed renamable $p0, implicit killed renamable $dc0, implicit killed renamable $dc4
@@ -174,7 +174,7 @@ body:             |
   bb.0.entry:
     liveins: $dc4, $dj4, $dn4, $p0, $m0, $dn0, $dj0, $dc0
     ; CHECK-LABEL: name: PADD_3D
-    ; CHECK: liveins: $dc0, $dc4, $dj0, $dj4, $dn0, $dn4, $m0, $p0, $d0_3d:0x001C000000800E00
+    ; CHECK: liveins: $dc0, $dc4, $dj0, $dj4, $dn0, $dn4, $m0, $p0, $d0_3d:0x0007000000800E00
     ; CHECK-NEXT: {{  $}}
     ; CHECK-NEXT: $p0, $dc0, $dc4 = PADDA_3D killed $p0, $d0_3d
     ; CHECK-NEXT: $p0, $dc0, $dc4 = PADDB_3D killed $p0, $d0_3d

diff --git a/llvm/test/CodeGen/AIE/aie2p/ra/tie-subregs-flow-3d.mir b/llvm/test/CodeGen/AIE/aie2p/ra/tie-subregs-flow-3d.mir
@@ -155,7 +155,7 @@ body:             |
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.2 (align 16):
   ; CHECK-NEXT:   successors: %bb.3(0x40000000), %bb.2(0x40000000)
-  ; CHECK-NEXT:   liveins: $dc0, $dc4, $dj0, $dj4, $dn0, $dn4, $m0, $p0, $r0, $r8, $d0_3d:0x001C000000800E00
+  ; CHECK-NEXT:   liveins: $dc0, $dc4, $dj0, $dj4, $dn0, $dn4, $m0, $p0, $r0, $r8, $d0_3d:0x0007000000800E00
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT:   ST_dms_sts_idx_imm renamable $r0, renamable $p0, 0 :: (store (s32))
   ; CHECK-NEXT:   renamable $r0 = nuw nsw ADD_add_r_ri killed renamable $r0, 1, implicit-def $srcarry
@@ -236,7 +236,7 @@ body:             |
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.1:
   ; CHECK-NEXT:   successors: %bb.2(0x80000000)
-  ; CHECK-NEXT:   liveins: $dc0, $dc4, $dj0, $dj4, $dn0, $dn4, $m0, $p0, $d0_3d:0x001C000000800E00
+  ; CHECK-NEXT:   liveins: $dc0, $dc4, $dj0, $dj4, $dn0, $dn4, $m0, $p0, $d0_3d:0x0007000000800E00
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT:   $p0, $dc0, dead $dc4 = PADDA_3D killed $p0, killed $d0_3d
   ; CHECK-NEXT: {{  $}}
@@ -302,7 +302,7 @@ body:             |
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.1:
   ; CHECK-NEXT:   successors:
-  ; CHECK-NEXT:   liveins: $dc4, $dj0, $dj4, $dn0, $dn4, $m0, $p0, $r9, $d0_3d:0x001C000000800C00
+  ; CHECK-NEXT:   liveins: $dc4, $dj0, $dj4, $dn0, $dn4, $m0, $p0, $r9, $d0_3d:0x0007000000800C00
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT:   RET implicit $lr
   ; CHECK-NEXT:   NOP
@@ -313,7 +313,7 @@ body:             |
   ; CHECK-NEXT:   DelayedSchedBarrier implicit killed renamable $dc0, implicit killed renamable $p0, implicit killed renamable $dc4
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.2 (align 16):
-  ; CHECK-NEXT:   liveins: $dc0, $dc4, $dj0, $dj4, $dn0, $dn4, $m0, $p0, $d0_3d:0x001C000000800E00
+  ; CHECK-NEXT:   liveins: $dc0, $dc4, $dj0, $dj4, $dn0, $dn4, $m0, $p0, $d0_3d:0x0007000000800E00
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT:   RET implicit $lr
   ; CHECK-NEXT:   NOP

diff --git a/llvm/test/CodeGen/AIE/staged-ra-rewrite.mir b/llvm/test/CodeGen/AIE/staged-ra-rewrite.mir
@@ -736,7 +736,7 @@ body:             |
   ; AIE2P-RA-NEXT:   renamable $d4 = COPY killed renamable $d5
   ; AIE2P-RA-NEXT: {{  $}}
   ; AIE2P-RA-NEXT: bb.1:
-  ; AIE2P-RA-NEXT:   liveins: $p0, $d0_3d:0x001C000000800E00
+  ; AIE2P-RA-NEXT:   liveins: $p0, $d0_3d:0x0007000000800E00
   ; AIE2P-RA-NEXT: {{  $}}
   ; AIE2P-RA-NEXT:   $p0, $dc0, $dc4 = PADDA_3D_split killed $p0, $m0, $dn0, $dj0, $dc0, undef $m4, $dn4, $dj4, $dc4
   ; AIE2P-RA-NEXT:   PseudoRET implicit $lr, implicit killed renamable $p0, implicit killed renamable $dc0, implicit renamable $dc4
@@ -826,7 +826,7 @@ body:             |
   ; AIE2P-RA-NEXT:   renamable $d4 = COPY killed renamable $d5
   ; AIE2P-RA-NEXT: {{  $}}
   ; AIE2P-RA-NEXT: bb.1:
-  ; AIE2P-RA-NEXT:   liveins: $p0, $d0_3d:0x001C000000800E00
+  ; AIE2P-RA-NEXT:   liveins: $p0, $d0_3d:0x0007000000800E00
   ; AIE2P-RA-NEXT: {{  $}}
   ; AIE2P-RA-NEXT:   $p0, $dc0, $dc4 = PADDA_3D_split killed $p0, $m0, $dn0, $dj0, $dc0, undef $m4, $dn4, $dj4, $dc4
   ; AIE2P-RA-NEXT:   PseudoRET implicit $lr, implicit killed renamable $p0, implicit killed renamable $dc0, implicit renamable $dc4