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[AIE2] Support >= and < operators for bf16.
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@SagarMaheshwari99
SagarMaheshwari99 committed May 13, 2024
1 parent 4f6958b commit 4fe5468
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Showing 2 changed files with 84 additions and 44 deletions.
4 changes: 4 additions & 0 deletions clang/lib/Headers/aiebase_typedefs.h
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Original file line number Diff line number Diff line change
Expand Up @@ -279,6 +279,10 @@ inline bfloat16 operator+(bfloat16 a) { return bfloat16(0) + a; }

/* compare operation with bfloat16 operands */
inline bool operator>(bfloat16 a, bfloat16 b) { return ((float)b < (float)a); }
inline bool operator>=(bfloat16 a, bfloat16 b) {
return !((float)a < (float)b);
}
inline bool operator<(bfloat16 a, bfloat16 b) { return ((float)a < (float)b); }
inline bool operator<=(bfloat16 a, bfloat16 b) { return !((float)a > (float)b); }
inline bool operator!=(bfloat16 a, bfloat16 b) { return !((float)a == (float)b); }
inline bool operator==(bfloat16 a, bfloat16 b) { return (float)a == (float)b; }
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124 changes: 80 additions & 44 deletions clang/test/CodeGen/aie/aie2/bfloat16.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -18,18 +18,18 @@ bfloat16 test_bfloat16(bfloat16 arg) {
}
// CHECK-LABEL: @_Z14test0_bfloat16i(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[CONV_I:%.*]] = sitofp i32 [[ARG0:%.*]] to float
// CHECK-NEXT: [[TMP0:%.*]] = bitcast float [[CONV_I]] to i32
// CHECK-NEXT: [[AND_I_I:%.*]] = and i32 [[TMP0]], 32768
// CHECK-NEXT: [[CMP_NOT_I_I:%.*]] = icmp eq i32 [[AND_I_I]], 0
// CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[ARG0:%.*]] to float
// CHECK-NEXT: [[TMP0:%.*]] = bitcast float [[CONV]] to i32
// CHECK-NEXT: [[AND_I:%.*]] = and i32 [[TMP0]], 32768
// CHECK-NEXT: [[CMP_NOT_I:%.*]] = icmp eq i32 [[AND_I]], 0
// CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 98303
// CHECK-NEXT: [[BRMERGE_NOT_I_I:%.*]] = icmp eq i32 [[TMP1]], 0
// CHECK-NEXT: [[ADD_I_I:%.*]] = add i32 [[TMP0]], 65536
// CHECK-NEXT: [[TMP2:%.*]] = or i1 [[CMP_NOT_I_I]], [[BRMERGE_NOT_I_I]]
// CHECK-NEXT: [[I32_0_I_I:%.*]] = select i1 [[TMP2]], i32 [[TMP0]], i32 [[ADD_I_I]]
// CHECK-NEXT: [[SHR_I_I:%.*]] = lshr i32 [[I32_0_I_I]], 16
// CHECK-NEXT: [[CONV_I_I:%.*]] = trunc i32 [[SHR_I_I]] to i16
// CHECK-NEXT: [[TMP3:%.*]] = bitcast i16 [[CONV_I_I]] to bfloat
// CHECK-NEXT: [[BRMERGE_NOT_I:%.*]] = icmp eq i32 [[TMP1]], 0
// CHECK-NEXT: [[ADD_I:%.*]] = add i32 [[TMP0]], 65536
// CHECK-NEXT: [[TMP2:%.*]] = or i1 [[CMP_NOT_I]], [[BRMERGE_NOT_I]]
// CHECK-NEXT: [[I32_0_I:%.*]] = select i1 [[TMP2]], i32 [[TMP0]], i32 [[ADD_I]]
// CHECK-NEXT: [[SHR_I:%.*]] = lshr i32 [[I32_0_I]], 16
// CHECK-NEXT: [[CONV_I:%.*]] = trunc i32 [[SHR_I]] to i16
// CHECK-NEXT: [[TMP3:%.*]] = bitcast i16 [[CONV_I]] to bfloat
// CHECK-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[CLASS_BFLOAT16:%.*]] poison, bfloat [[TMP3]], 0
// CHECK-NEXT: ret [[CLASS_BFLOAT16]] [[DOTFCA_0_INSERT]]
//
Expand Down Expand Up @@ -58,18 +58,18 @@ bfloat16 test1_bfloat16(float arg0) {
}
// CHECK-LABEL: @_Z14test2_bfloat16j(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[CONV_I:%.*]] = uitofp i32 [[ARG0:%.*]] to float
// CHECK-NEXT: [[TMP0:%.*]] = bitcast float [[CONV_I]] to i32
// CHECK-NEXT: [[AND_I_I:%.*]] = and i32 [[TMP0]], 32768
// CHECK-NEXT: [[CMP_NOT_I_I:%.*]] = icmp eq i32 [[AND_I_I]], 0
// CHECK-NEXT: [[CONV:%.*]] = uitofp i32 [[ARG0:%.*]] to float
// CHECK-NEXT: [[TMP0:%.*]] = bitcast float [[CONV]] to i32
// CHECK-NEXT: [[AND_I:%.*]] = and i32 [[TMP0]], 32768
// CHECK-NEXT: [[CMP_NOT_I:%.*]] = icmp eq i32 [[AND_I]], 0
// CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 98303
// CHECK-NEXT: [[BRMERGE_NOT_I_I:%.*]] = icmp eq i32 [[TMP1]], 0
// CHECK-NEXT: [[ADD_I_I:%.*]] = add i32 [[TMP0]], 65536
// CHECK-NEXT: [[TMP2:%.*]] = or i1 [[CMP_NOT_I_I]], [[BRMERGE_NOT_I_I]]
// CHECK-NEXT: [[I32_0_I_I:%.*]] = select i1 [[TMP2]], i32 [[TMP0]], i32 [[ADD_I_I]]
// CHECK-NEXT: [[SHR_I_I:%.*]] = lshr i32 [[I32_0_I_I]], 16
// CHECK-NEXT: [[CONV_I_I:%.*]] = trunc i32 [[SHR_I_I]] to i16
// CHECK-NEXT: [[TMP3:%.*]] = bitcast i16 [[CONV_I_I]] to bfloat
// CHECK-NEXT: [[BRMERGE_NOT_I:%.*]] = icmp eq i32 [[TMP1]], 0
// CHECK-NEXT: [[ADD_I:%.*]] = add i32 [[TMP0]], 65536
// CHECK-NEXT: [[TMP2:%.*]] = or i1 [[CMP_NOT_I]], [[BRMERGE_NOT_I]]
// CHECK-NEXT: [[I32_0_I:%.*]] = select i1 [[TMP2]], i32 [[TMP0]], i32 [[ADD_I]]
// CHECK-NEXT: [[SHR_I:%.*]] = lshr i32 [[I32_0_I]], 16
// CHECK-NEXT: [[CONV_I:%.*]] = trunc i32 [[SHR_I]] to i16
// CHECK-NEXT: [[TMP3:%.*]] = bitcast i16 [[CONV_I]] to bfloat
// CHECK-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[CLASS_BFLOAT16:%.*]] poison, bfloat [[TMP3]], 0
// CHECK-NEXT: ret [[CLASS_BFLOAT16]] [[DOTFCA_0_INSERT]]
//
Expand All @@ -78,18 +78,18 @@ bfloat16 test2_bfloat16(unsigned arg0) {
}
// CHECK-LABEL: @_Z14test3_bfloat16s(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[CONV_I:%.*]] = sitofp i16 [[ARG0:%.*]] to float
// CHECK-NEXT: [[TMP0:%.*]] = bitcast float [[CONV_I]] to i32
// CHECK-NEXT: [[AND_I_I:%.*]] = and i32 [[TMP0]], 32768
// CHECK-NEXT: [[CMP_NOT_I_I:%.*]] = icmp eq i32 [[AND_I_I]], 0
// CHECK-NEXT: [[CONV:%.*]] = sitofp i16 [[ARG0:%.*]] to float
// CHECK-NEXT: [[TMP0:%.*]] = bitcast float [[CONV]] to i32
// CHECK-NEXT: [[AND_I:%.*]] = and i32 [[TMP0]], 32768
// CHECK-NEXT: [[CMP_NOT_I:%.*]] = icmp eq i32 [[AND_I]], 0
// CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 98303
// CHECK-NEXT: [[BRMERGE_NOT_I_I:%.*]] = icmp eq i32 [[TMP1]], 0
// CHECK-NEXT: [[ADD_I_I:%.*]] = add i32 [[TMP0]], 65536
// CHECK-NEXT: [[TMP2:%.*]] = or i1 [[CMP_NOT_I_I]], [[BRMERGE_NOT_I_I]]
// CHECK-NEXT: [[I32_0_I_I:%.*]] = select i1 [[TMP2]], i32 [[TMP0]], i32 [[ADD_I_I]]
// CHECK-NEXT: [[SHR_I_I:%.*]] = lshr i32 [[I32_0_I_I]], 16
// CHECK-NEXT: [[CONV_I_I:%.*]] = trunc i32 [[SHR_I_I]] to i16
// CHECK-NEXT: [[TMP3:%.*]] = bitcast i16 [[CONV_I_I]] to bfloat
// CHECK-NEXT: [[BRMERGE_NOT_I:%.*]] = icmp eq i32 [[TMP1]], 0
// CHECK-NEXT: [[ADD_I:%.*]] = add i32 [[TMP0]], 65536
// CHECK-NEXT: [[TMP2:%.*]] = or i1 [[CMP_NOT_I]], [[BRMERGE_NOT_I]]
// CHECK-NEXT: [[I32_0_I:%.*]] = select i1 [[TMP2]], i32 [[TMP0]], i32 [[ADD_I]]
// CHECK-NEXT: [[SHR_I:%.*]] = lshr i32 [[I32_0_I]], 16
// CHECK-NEXT: [[CONV_I:%.*]] = trunc i32 [[SHR_I]] to i16
// CHECK-NEXT: [[TMP3:%.*]] = bitcast i16 [[CONV_I]] to bfloat
// CHECK-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[CLASS_BFLOAT16:%.*]] poison, bfloat [[TMP3]], 0
// CHECK-NEXT: ret [[CLASS_BFLOAT16]] [[DOTFCA_0_INSERT]]
//
Expand All @@ -98,18 +98,18 @@ bfloat16 test3_bfloat16(short arg0) {
}
// CHECK-LABEL: @_Z14test4_bfloat16c(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[CONV_I:%.*]] = sitofp i8 [[ARG0:%.*]] to float
// CHECK-NEXT: [[TMP0:%.*]] = bitcast float [[CONV_I]] to i32
// CHECK-NEXT: [[AND_I_I:%.*]] = and i32 [[TMP0]], 32768
// CHECK-NEXT: [[CMP_NOT_I_I:%.*]] = icmp eq i32 [[AND_I_I]], 0
// CHECK-NEXT: [[CONV:%.*]] = sitofp i8 [[ARG0:%.*]] to float
// CHECK-NEXT: [[TMP0:%.*]] = bitcast float [[CONV]] to i32
// CHECK-NEXT: [[AND_I:%.*]] = and i32 [[TMP0]], 32768
// CHECK-NEXT: [[CMP_NOT_I:%.*]] = icmp eq i32 [[AND_I]], 0
// CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 98303
// CHECK-NEXT: [[BRMERGE_NOT_I_I:%.*]] = icmp eq i32 [[TMP1]], 0
// CHECK-NEXT: [[ADD_I_I:%.*]] = add i32 [[TMP0]], 65536
// CHECK-NEXT: [[TMP2:%.*]] = or i1 [[CMP_NOT_I_I]], [[BRMERGE_NOT_I_I]]
// CHECK-NEXT: [[I32_0_I_I:%.*]] = select i1 [[TMP2]], i32 [[TMP0]], i32 [[ADD_I_I]]
// CHECK-NEXT: [[SHR_I_I:%.*]] = lshr i32 [[I32_0_I_I]], 16
// CHECK-NEXT: [[CONV_I_I:%.*]] = trunc i32 [[SHR_I_I]] to i16
// CHECK-NEXT: [[TMP3:%.*]] = bitcast i16 [[CONV_I_I]] to bfloat
// CHECK-NEXT: [[BRMERGE_NOT_I:%.*]] = icmp eq i32 [[TMP1]], 0
// CHECK-NEXT: [[ADD_I:%.*]] = add i32 [[TMP0]], 65536
// CHECK-NEXT: [[TMP2:%.*]] = or i1 [[CMP_NOT_I]], [[BRMERGE_NOT_I]]
// CHECK-NEXT: [[I32_0_I:%.*]] = select i1 [[TMP2]], i32 [[TMP0]], i32 [[ADD_I]]
// CHECK-NEXT: [[SHR_I:%.*]] = lshr i32 [[I32_0_I]], 16
// CHECK-NEXT: [[CONV_I:%.*]] = trunc i32 [[SHR_I]] to i16
// CHECK-NEXT: [[TMP3:%.*]] = bitcast i16 [[CONV_I]] to bfloat
// CHECK-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[CLASS_BFLOAT16:%.*]] poison, bfloat [[TMP3]], 0
// CHECK-NEXT: ret [[CLASS_BFLOAT16]] [[DOTFCA_0_INSERT]]
//
Expand Down Expand Up @@ -456,6 +456,42 @@ bool bfloat_cmp_le(bfloat16 arg0, bfloat16 arg1) {
bool bfloat_cmp_ne(bfloat16 arg0, bfloat16 arg1) {
return (arg0 != arg1);
}
// CHECK-LABEL: @_Z13bfloat_cmp_ge8bfloat16S_(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[A_COERCE_FCA_0_EXTRACT_I:%.*]] = extractvalue [[CLASS_BFLOAT16:%.*]] [[ARG0_COERCE:%.*]], 0
// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT_I:%.*]] = extractvalue [[CLASS_BFLOAT16]] [[ARG1_COERCE:%.*]], 0
// CHECK-NEXT: [[TMP0:%.*]] = bitcast bfloat [[A_COERCE_FCA_0_EXTRACT_I]] to i16
// CHECK-NEXT: [[CONV_I_I:%.*]] = zext i16 [[TMP0]] to i32
// CHECK-NEXT: [[SHL_I_I:%.*]] = shl nuw i32 [[CONV_I_I]], 16
// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32 [[SHL_I_I]] to float
// CHECK-NEXT: [[TMP2:%.*]] = bitcast bfloat [[B_COERCE_FCA_0_EXTRACT_I]] to i16
// CHECK-NEXT: [[CONV_I2_I:%.*]] = zext i16 [[TMP2]] to i32
// CHECK-NEXT: [[SHL_I3_I:%.*]] = shl nuw i32 [[CONV_I2_I]], 16
// CHECK-NEXT: [[TMP3:%.*]] = bitcast i32 [[SHL_I3_I]] to float
// CHECK-NEXT: [[CMP_I:%.*]] = fcmp uge float [[TMP1]], [[TMP3]]
// CHECK-NEXT: ret i1 [[CMP_I]]
//
bool bfloat_cmp_ge(bfloat16 arg0, bfloat16 arg1) {
return (arg0 >= arg1);
}
// CHECK-LABEL: @_Z15bfloat16_cmp_lt8bfloat16S_(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[A_COERCE_FCA_0_EXTRACT_I:%.*]] = extractvalue [[CLASS_BFLOAT16:%.*]] [[ARG0_COERCE:%.*]], 0
// CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT_I:%.*]] = extractvalue [[CLASS_BFLOAT16]] [[ARG1_COERCE:%.*]], 0
// CHECK-NEXT: [[TMP0:%.*]] = bitcast bfloat [[A_COERCE_FCA_0_EXTRACT_I]] to i16
// CHECK-NEXT: [[CONV_I_I:%.*]] = zext i16 [[TMP0]] to i32
// CHECK-NEXT: [[SHL_I_I:%.*]] = shl nuw i32 [[CONV_I_I]], 16
// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32 [[SHL_I_I]] to float
// CHECK-NEXT: [[TMP2:%.*]] = bitcast bfloat [[B_COERCE_FCA_0_EXTRACT_I]] to i16
// CHECK-NEXT: [[CONV_I2_I:%.*]] = zext i16 [[TMP2]] to i32
// CHECK-NEXT: [[SHL_I3_I:%.*]] = shl nuw i32 [[CONV_I2_I]], 16
// CHECK-NEXT: [[TMP3:%.*]] = bitcast i32 [[SHL_I3_I]] to float
// CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt float [[TMP1]], [[TMP3]]
// CHECK-NEXT: ret i1 [[CMP_I]]
//
bool bfloat16_cmp_lt(bfloat16 arg0, bfloat16 arg1) {
return (arg0 < arg1);
}
// CHECK-LABEL: @_Z13bfloat_cmp_eq8bfloat16S_(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[A_COERCE_FCA_0_EXTRACT_I:%.*]] = extractvalue [[CLASS_BFLOAT16:%.*]] [[ARG0_COERCE:%.*]], 0
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