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Allow users to specify riscv cpu and get hardware features (iree-org#…
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…16902)

Allow users to specify riscv cpu and get hardware features. 
e.g.,
```
iree-compile \
  --iree-hal-target-backends=llvm-cpu \
  --iree-llvmcpu-target-triple=riscv64-pc-linux-gnu \
  --iree-llvmcpu-target-cpu=sifive-x280 \
  --iree-llvmcpu-target-abi=lp64d \
  --riscv-v-fixed-length-vector-lmul-max=8 \
  xxx.mlirbc -o xxx.vmfb
```

Signed-off-by: Alex Chiang <[email protected]>
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alexsifivetw authored Apr 8, 2024
1 parent bb7e536 commit 190d959
Showing 1 changed file with 16 additions and 8 deletions.
24 changes: 16 additions & 8 deletions compiler/plugins/target/LLVMCPU/LLVMTargetOptions.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,7 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/TargetParser/Host.h"
#include "llvm/TargetParser/RISCVTargetParser.h"
#include "llvm/TargetParser/SubtargetFeature.h"
#include "llvm/TargetParser/Triple.h"
#include "llvm/TargetParser/X86TargetParser.h"
Expand Down Expand Up @@ -67,20 +68,26 @@ bool resolveCPUAndCPUFeatures(llvm::StringRef inCpu,
outCpuFeatures = targetCpuFeatures.getString();
}

// If CPU is non-host and non-generic then we need to populate the
// corresponding features.
if (outCpu.empty() || inCpu == "host" || inCpu == "generic" ||
inCpu.starts_with("generic-")) {
return true;
}
if (triple.isX86()) {
llvm::SubtargetFeatures targetCpuFeatures(outCpuFeatures);
llvm::SmallVector<llvm::StringRef> cpuFeatureList;
llvm::X86::getFeaturesForCPU(outCpu, cpuFeatureList);
for (auto &feature : cpuFeatureList) {
// If CPU is non-host and non-generic then we need to populate the
// corresponding features.
llvm::SubtargetFeatures targetCpuFeatures(outCpuFeatures);
auto addCpuFeatures = [&](const auto &getFeaturesForCPU,
auto &cpuFeatureList) {
getFeaturesForCPU(outCpu, cpuFeatureList, false);
for (const auto &feature : cpuFeatureList) {
targetCpuFeatures.AddFeature(feature);
}
outCpuFeatures = targetCpuFeatures.getString();
};
if (triple.isX86()) {
llvm::SmallVector<llvm::StringRef> cpuFeatureList;
addCpuFeatures(llvm::X86::getFeaturesForCPU, cpuFeatureList);
} else if (triple.isRISCV64()) {
llvm::SmallVector<std::string> cpuFeatureList;
addCpuFeatures(llvm::RISCV::getFeaturesForCPU, cpuFeatureList);
} else {
llvm::errs()
<< "error: Resolution of target CPU to target CPU features is not "
Expand All @@ -90,6 +97,7 @@ bool resolveCPUAndCPUFeatures(llvm::StringRef inCpu,
"on this architecture, or implement that.\n";
return false;
}
outCpuFeatures = targetCpuFeatures.getString();
return true;
}

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