Updated Unit test

ansys · Jan 20, 2025 · 7f5d87f · 7f5d87f
1 parent 0d9cf51
commit 7f5d87f
Showing 1 changed file with 2 additions and 0 deletions.
diff --git a/tests/system/general/test_12_PostProcessing.py b/tests/system/general/test_12_PostProcessing.py
@@ -762,6 +762,8 @@ def test_76_emi_receiver(self, emi_receiver_test):
         emi_receiver_test.analyze()
         new_report = emi_receiver_test.post.reports_by_category.emi_receiver()
         new_report.band = "2"
+        new_report.rbw = "2"
+        new_report.rbw_factor = "0"
         new_report.emission = "RE"
         new_report.time_start = "1ns"
         new_report.time_stop = "2us"