fix: use target_arch in x86_rtc to bypass clippy error in aarch64 and…

… riscv64

Cargo.toml

@@ -72,7 +72,7 @@ members = [
     "apps/task/sleep",
     "apps/task/yield",
     "apps/task/priority",
-    "apps/task/tls", "crates/x86_rtc", "crates/arm_pl031", "crates/riscv_goldfish",
+    "apps/task/tls",
 ]
 
 [profile.release]

crates/x86_rtc/Cargo.toml

@@ -3,5 +3,5 @@ name = "x86_rtc"
 version = "0.1.0"
 edition = "2021"
 
-[dependencies]
-x86_64 = "0.14"
+[target.'cfg(target_arch = "x86_64")'.dependencies]
+x86_64 = "0.15"

crates/x86_rtc/src/lib.rs

@@ -3,11 +3,6 @@
 
 #![cfg_attr(not(test), no_std)]
 
-const CMOS_COMMAND_PORT: u16 = 0x70;
-const CMOS_DATA_PORT: u16 = 0x71;
-
-const CMOS_DISABLE_NMI: u8 = 1 << 7;
-
 const CMOS_SECOND_REGISTER: u8 = 0x00;
 const CMOS_MINUTE_REGISTER: u8 = 0x02;
 const CMOS_HOUR_REGISTER: u8 = 0x04;
@@ -31,7 +26,7 @@ impl Rtc {
     /// Construct a new CMOS RTC structure.
     pub fn new() -> Self {
         Self {
-            cmos_format: Self::read_cmos_register(CMOS_STATUS_REGISTER_B),
+            cmos_format: read_cmos_register(CMOS_STATUS_REGISTER_B),
         }
     }
 
@@ -65,23 +60,11 @@ impl Rtc {
             (y / 4 - y / 100 + y / 400 + 367 * m / 12 + u64::from(day)) + y * 365 - 719_499;
         let hours_since_epoch = days_since_epoch * 24 + u64::from(hour);
         let minutes_since_epoch = hours_since_epoch * 60 + u64::from(minute);
-        let seconds_since_epoch = minutes_since_epoch * 60 + u64::from(second);
-
-        seconds_since_epoch
-    }
-
-    fn read_cmos_register(register: u8) -> u8 {
-        unsafe {
-            use x86_64::instructions::port::Port;
-            let mut command_port = Port::new(CMOS_COMMAND_PORT);
-            let mut data_port = Port::new(CMOS_DATA_PORT);
-            command_port.write(CMOS_DISABLE_NMI | register);
-            data_port.read()
-        }
+        minutes_since_epoch * 60 + u64::from(second)
     }
 
     fn read_datetime_register(&self, register: u8) -> u8 {
-        let value = Self::read_cmos_register(register);
+        let value = read_cmos_register(register);
 
         // Every date/time register may either be in binary or in BCD format.
         // Convert BCD values if necessary.
@@ -101,7 +84,7 @@ impl Rtc {
         // The hour register is a bitch.
         // On top of being in either binary or BCD format, it may also be in 12-hour
         // or 24-hour format.
-        let mut hour = Self::read_cmos_register(CMOS_HOUR_REGISTER);
+        let mut hour = read_cmos_register(CMOS_HOUR_REGISTER);
         let mut is_pm = false;
 
         // Check and mask off a potential PM flag if the hour is given in 12-hour format.
@@ -142,9 +125,7 @@ impl Rtc {
     pub fn get_unix_timestamp(&self) -> u64 {
         loop {
             // If a clock update is currently in progress, wait until it is finished.
-            while Self::read_cmos_register(CMOS_STATUS_REGISTER_A) & CMOS_UPDATE_IN_PROGRESS_FLAG
-                > 0
-            {
+            while read_cmos_register(CMOS_STATUS_REGISTER_A) & CMOS_UPDATE_IN_PROGRESS_FLAG > 0 {
                 core::hint::spin_loop();
             }
 
@@ -153,7 +134,7 @@ impl Rtc {
 
             // If the clock is already updating the time again, the read values may be inconsistent
             // and we have to repeat this process.
-            if Self::read_cmos_register(CMOS_STATUS_REGISTER_A) & CMOS_UPDATE_IN_PROGRESS_FLAG > 0 {
+            if read_cmos_register(CMOS_STATUS_REGISTER_A) & CMOS_UPDATE_IN_PROGRESS_FLAG > 0 {
                 continue;
             }
 
@@ -166,3 +147,24 @@ impl Rtc {
         }
     }
 }
+
+#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
+fn read_cmos_register(register: u8) -> u8 {
+    const CMOS_COMMAND_PORT: u16 = 0x70;
+    const CMOS_DATA_PORT: u16 = 0x71;
+
+    const CMOS_DISABLE_NMI: u8 = 1 << 7;
+
+    unsafe {
+        use x86_64::instructions::port::Port;
+        let mut command_port = Port::new(CMOS_COMMAND_PORT);
+        let mut data_port = Port::new(CMOS_DATA_PORT);
+        command_port.write(CMOS_DISABLE_NMI | register);
+        data_port.read()
+    }
+}
+
+#[cfg(not(any(target_arch = "x86", target_arch = "x86_64")))]
+fn read_cmos_register(_register: u8) -> u8 {
+    0
+}