cpu/cc26xx_cc13xx: Fix codespell issues

Signed-off-by: Anton Gerasimov <[email protected]>
bosmoment · Oct 29, 2019 · 6790e9e · 6790e9e
1 parent 6258713
commit 6790e9e
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Showing 4 changed files with 5 additions and 5 deletions.
diff --git a/cpu/cc13x2/include/cc13x2_fcfg.h b/cpu/cc13x2/include/cc13x2_fcfg.h
@@ -82,7 +82,7 @@ typedef struct {
     reg32_t MAC_15_4_1; /**< MAC IEEE 802.15.4 address 1 */
     reg32_t __reserved8[4]; /**< meh */
     reg32_t FLASH_OTP_DATA4; /**< Internal */
-    reg32_t MISC_TRIM; /**< Miscelaneous trim parameters */
+    reg32_t MISC_TRIM; /**< Miscellaneous trim parameters */
     reg32_t RCOSC_HF_TEMPCOMP; /**< Internal */
     reg32_t __reserved9; /**< meh */
     reg32_t ICEPICK_DEVICE_ID; /**< IcePick Device Identification */

diff --git a/cpu/cc26x0/include/cc26x0_prcm.h b/cpu/cc26x0/include/cc26x0_prcm.h
@@ -140,7 +140,7 @@ typedef struct {
 
 #define AUXCLK_SRC_HF               0x1 /* SCLK for AUX */
 #define AUXCLK_SRC_LF               0x4
-#define AUXCLK_SRC_mask             0x7 /* garuanteed to be glitchless */
+#define AUXCLK_SRC_mask             0x7 /* guaranteed to be glitchless */
 #define AUXCLK_SCLK_HF_DIV_pos      8 /* don't set while SCLK_HF active for AUX */
 #define AUXCLK_SCLK_HF_DIV_mask     0x700 /* divisor will be 2^(value+1) */
 #define AUXCLK_PWR_DWN_SRC_pos      11 /* SCLK_LF in powerdown when SCLK_HF is source (no clock elsewise?!)  */

diff --git a/cpu/cc26xx_cc13xx/include/cc26xx_cc13xx_vims.h b/cpu/cc26xx_cc13xx/include/cc26xx_cc13xx_vims.h
@@ -41,7 +41,7 @@ typedef struct {
     reg32_t DATALOWER; /**< efuse data - lower */
     reg32_t EFUSECFG; /**< OCP sysconf */
     reg32_t EFUSESTAT; /**< system status */
-    reg32_t ACC; /**< arbitrary instruction cound */
+    reg32_t ACC; /**< arbitrary instruction count */
     reg32_t BOUNDARY; /**< boundary test register to drive I/O */
     reg32_t EFUSEFLAG; /**< efuse key loaded flag */
     reg32_t EFUSEKEY; /**< efuse key */
@@ -105,7 +105,7 @@ typedef struct {
     reg32_t FWPWRITE_ECC; /**< FMC flash wide programming ECC */
     reg32_t FSWSTAT; /**< FMC software interface status */
     reg32_t __reserved12[0x2E]; /**< meh */
-    reg32_t FSM_GLBCTL; /**< FMC FSM global controll */
+    reg32_t FSM_GLBCTL; /**< FMC FSM global control */
     reg32_t FSM_STATE; /**< FMC FSM state status */
     reg32_t FSM_STAT; /**< FMC FSM status */
     reg32_t FSM_CMD; /**< FMC FSM command */

diff --git a/cpu/cc26xx_cc13xx/periph/timer.c b/cpu/cc26xx_cc13xx/periph/timer.c
@@ -193,7 +193,7 @@ int timer_clear(tim_t tim, int channel)
     if ((tim >= TIMER_NUMOF) || (channel >= timer_config[tim].chn)) {
         return -1;
     }
-    /* clear interupt flags */
+    /* clear interrupt flags */
     dev(tim)->IMR &= ~(chn_isr_cfg[channel].flag);
 
     return 0;