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winch: x64 atomic stores #9987

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merged 17 commits into from
Jan 15, 2025
Merged

winch: x64 atomic stores #9987

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f9d6efe
add MemOpKind to wasm_store
MarinPostma Jan 12, 2025
c9b4a0c
add fence to x64 asm
MarinPostma Jan 12, 2025
8454623
implement atomic store for x64 masm
MarinPostma Jan 12, 2025
b36054c
emit error for 128bits atomic store
MarinPostma Jan 12, 2025
cc27c42
propagate MemOpKind from Visitor
MarinPostma Jan 12, 2025
2473ccd
implement atomic store visitor methods
MarinPostma Jan 12, 2025
be4ea92
add atomic store tests
MarinPostma Jan 12, 2025
8bcd530
fmt
MarinPostma Jan 12, 2025
c7c5d6a
whitelist spec tests
MarinPostma Jan 12, 2025
a9e35fe
atomic heap address compute align check
MarinPostma Jan 13, 2025
30cee24
fmt
MarinPostma Jan 13, 2025
4293461
edit comment
MarinPostma Jan 13, 2025
5864b5f
cleanup check align function
MarinPostma Jan 13, 2025
f7044ef
add doc for check_align
MarinPostma Jan 13, 2025
54f24d7
review edits
MarinPostma Jan 14, 2025
e16d7d8
review edits
MarinPostma Jan 14, 2025
cd24682
final edits
MarinPostma Jan 15, 2025
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6 changes: 0 additions & 6 deletions crates/wast-util/src/lib.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -488,15 +488,9 @@ impl WastTest {
"spec_testsuite/simd_store8_lane.wast",
// thread related failures
"proposals/threads/atomic.wast",
"misc_testsuite/threads/MP_wait.wast",
"misc_testsuite/threads/load-store-alignment.wast",
"misc_testsuite/threads/MP_atomic.wast",
"misc_testsuite/threads/SB_atomic.wast",
"misc_testsuite/threads/wait_notify.wast",
"misc_testsuite/threads/LB_atomic.wast",
"misc_testsuite/threads/atomics_wait_address.wast",
"misc_testsuite/threads/atomics_notify.wast",
"misc_testsuite/threads/load-store-alignment.wast",
];

if unsupported.iter().any(|part| self.path.ends_with(part)) {
Expand Down
9 changes: 7 additions & 2 deletions tests/disas/winch/x64/atomic/load/i32_atomic_load.wat
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Expand Up @@ -13,18 +13,23 @@
;; movq 0x10(%r11), %r11
;; addq $0x20, %r11
;; cmpq %rsp, %r11
;; ja 0x47
;; ja 0x57
;; 1c: movq %rdi, %r14
;; subq $0x20, %rsp
;; movq %rdi, 0x18(%rsp)
;; movq %rsi, 0x10(%rsp)
;; movl %edx, 0xc(%rsp)
;; movl 0xc(%rsp), %eax
;; andl $3, %eax
;; cmpl $0, %eax
;; jne 0x59
;; 41: movl 0xc(%rsp), %eax
;; movq 0x58(%r14), %r11
;; movq (%r11), %rcx
;; addq %rax, %rcx
;; movl (%rcx), %eax
;; addq $0x20, %rsp
;; popq %rbp
;; retq
;; 47: ud2
;; 57: ud2
;; 59: ud2
9 changes: 7 additions & 2 deletions tests/disas/winch/x64/atomic/load/i32_atomic_load16_u.wat
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Expand Up @@ -13,18 +13,23 @@
;; movq 0x10(%r11), %r11
;; addq $0x20, %r11
;; cmpq %rsp, %r11
;; ja 0x49
;; ja 0x5b
;; 1c: movq %rdi, %r14
;; subq $0x20, %rsp
;; movq %rdi, 0x18(%rsp)
;; movq %rsi, 0x10(%rsp)
;; movl %edx, 0xc(%rsp)
;; movl 0xc(%rsp), %eax
;; andw $1, %ax
;; cmpw $0, %ax
;; jne 0x5d
;; 43: movl 0xc(%rsp), %eax
;; movq 0x58(%r14), %r11
;; movq (%r11), %rcx
;; addq %rax, %rcx
;; movzwq (%rcx), %rax
;; addq $0x20, %rsp
;; popq %rbp
;; retq
;; 49: ud2
;; 5b: ud2
;; 5d: ud2
9 changes: 7 additions & 2 deletions tests/disas/winch/x64/atomic/load/i64_atomic_load.wat
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Expand Up @@ -14,16 +14,21 @@
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x41
;; ja 0x54
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movl $0, %eax
;; andq $7, %rax
;; cmpq $0, %rax
;; jne 0x56
;; 3f: movl $0, %eax
;; movq 0x60(%r14), %rcx
;; addq %rax, %rcx
;; movq (%rcx), %rax
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 41: ud2
;; 54: ud2
;; 56: ud2
9 changes: 7 additions & 2 deletions tests/disas/winch/x64/atomic/load/i64_atomic_load16_u.wat
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Expand Up @@ -14,16 +14,21 @@
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x42
;; ja 0x55
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movl $0, %eax
;; andw $1, %ax
;; cmpw $0, %ax
;; jne 0x57
;; 3f: movl $0, %eax
;; movq 0x60(%r14), %rcx
;; addq %rax, %rcx
;; movzwq (%rcx), %rax
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 42: ud2
;; 55: ud2
;; 57: ud2
9 changes: 7 additions & 2 deletions tests/disas/winch/x64/atomic/load/i64_atomic_load32_u.wat
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Expand Up @@ -14,16 +14,21 @@
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x40
;; ja 0x51
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movl $0, %eax
;; andl $3, %eax
;; cmpl $0, %eax
;; jne 0x53
;; 3d: movl $0, %eax
;; movq 0x60(%r14), %rcx
;; addq %rax, %rcx
;; movl (%rcx), %eax
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 40: ud2
;; 51: ud2
;; 53: ud2
34 changes: 34 additions & 0 deletions tests/disas/winch/x64/atomic/store/i32_atomic_store.wat
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@@ -0,0 +1,34 @@
;;! target = "x86_64"
;;! test = "winch"

(module
(import "env" "memory" (memory 1 1 shared))
(func (i32.atomic.store (i32.const 0) (i32.const 42))))
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x5c
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movl $0x2a, %eax
;; movl $0, %ecx
;; andl $3, %ecx
;; cmpl $0, %ecx
;; jne 0x5e
;; 42: movl $0, %ecx
;; movq 0x58(%r14), %r11
;; movq (%r11), %rdx
;; addq %rcx, %rdx
;; movl %eax, (%rdx)
;; mfence
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 5c: ud2
;; 5e: ud2
34 changes: 34 additions & 0 deletions tests/disas/winch/x64/atomic/store/i32_atomic_store16.wat
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@@ -0,0 +1,34 @@
;;! target = "x86_64"
;;! test = "winch"

(module
(import "env" "memory" (memory 1 1 shared))
(func (i32.atomic.store16 (i32.const 0) (i32.const 42))))
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x5f
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movl $0x2a, %eax
;; movl $0, %ecx
;; andw $1, %cx
;; cmpw $0, %cx
;; jne 0x61
;; 44: movl $0, %ecx
;; movq 0x58(%r14), %r11
;; movq (%r11), %rdx
;; addq %rcx, %rdx
;; movw %ax, (%rdx)
;; mfence
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 5f: ud2
;; 61: ud2
29 changes: 29 additions & 0 deletions tests/disas/winch/x64/atomic/store/i32_atomic_store8.wat
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@@ -0,0 +1,29 @@
;;! target = "x86_64"
;;! test = "winch"

(module
(import "env" "memory" (memory 1 1 shared))
(func (i32.atomic.store8 (i32.const 0) (i32.const 42))))
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x4b
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movl $0x2a, %eax
;; movl $0, %ecx
;; movq 0x58(%r14), %r11
;; movq (%r11), %rdx
;; addq %rcx, %rdx
;; movb %al, (%rdx)
;; mfence
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 4b: ud2
34 changes: 34 additions & 0 deletions tests/disas/winch/x64/atomic/store/i64_atomic_store.wat
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@@ -0,0 +1,34 @@
;;! target = "x86_64"
;;! test = "winch"

(module
(import "env" "memory" (memory 1 1 shared))
(func (i64.atomic.store (i32.const 0) (i64.const 42))))
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x61
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movq $0x2a, %rax
;; movl $0, %ecx
;; andq $7, %rcx
;; cmpq $0, %rcx
;; jne 0x63
;; 46: movl $0, %ecx
;; movq 0x58(%r14), %r11
;; movq (%r11), %rdx
;; addq %rcx, %rdx
;; movq %rax, (%rdx)
;; mfence
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 61: ud2
;; 63: ud2
34 changes: 34 additions & 0 deletions tests/disas/winch/x64/atomic/store/i64_atomic_store16.wat
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@@ -0,0 +1,34 @@
;;! target = "x86_64"
;;! test = "winch"

(module
(import "env" "memory" (memory 1 1 shared))
(func (i64.atomic.store16 (i32.const 0) (i64.const 42))))
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x61
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movq $0x2a, %rax
;; movl $0, %ecx
;; andw $1, %cx
;; cmpw $0, %cx
;; jne 0x63
;; 46: movl $0, %ecx
;; movq 0x58(%r14), %r11
;; movq (%r11), %rdx
;; addq %rcx, %rdx
;; movw %ax, (%rdx)
;; mfence
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 61: ud2
;; 63: ud2
34 changes: 34 additions & 0 deletions tests/disas/winch/x64/atomic/store/i64_atomic_store32.wat
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@@ -0,0 +1,34 @@
;;! target = "x86_64"
;;! test = "winch"

(module
(import "env" "memory" (memory 1 1 shared))
(func (i64.atomic.store32 (i32.const 0) (i64.const 42))))
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x5e
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movq $0x2a, %rax
;; movl $0, %ecx
;; andl $3, %ecx
;; cmpl $0, %ecx
;; jne 0x60
;; 44: movl $0, %ecx
;; movq 0x58(%r14), %r11
;; movq (%r11), %rdx
;; addq %rcx, %rdx
;; movl %eax, (%rdx)
;; mfence
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 5e: ud2
;; 60: ud2
29 changes: 29 additions & 0 deletions tests/disas/winch/x64/atomic/store/i64_atomic_store8.wat
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Original file line number Diff line number Diff line change
@@ -0,0 +1,29 @@
;;! target = "x86_64"
;;! test = "winch"

(module
(import "env" "memory" (memory 1 1 shared))
(func (i64.atomic.store8 (i32.const 0) (i64.const 42))))
;; wasm[0]::function[0]:
;; pushq %rbp
;; movq %rsp, %rbp
;; movq 8(%rdi), %r11
;; movq 0x10(%r11), %r11
;; addq $0x10, %r11
;; cmpq %rsp, %r11
;; ja 0x4d
;; 1c: movq %rdi, %r14
;; subq $0x10, %rsp
;; movq %rdi, 8(%rsp)
;; movq %rsi, (%rsp)
;; movq $0x2a, %rax
;; movl $0, %ecx
;; movq 0x58(%r14), %r11
;; movq (%r11), %rdx
;; addq %rcx, %rdx
;; movb %al, (%rdx)
;; mfence
;; addq $0x10, %rsp
;; popq %rbp
;; retq
;; 4d: ud2
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