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tidy up some junk
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catphish committed Jul 21, 2018
1 parent 2a0dd8d commit dac0770
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Showing 2 changed files with 15 additions and 35 deletions.
30 changes: 6 additions & 24 deletions main.c
Original file line number Diff line number Diff line change
Expand Up @@ -7,10 +7,10 @@

uint16_t adc_data[4];

int sine_angle = 0;
int frequency = 1;
int angle = 0;
int frequency = 0;

float i1, i2, total_current;
float i1, i2;

void uart_write_string(char* str);
void uart_write_int(int32_t i);
Expand Down Expand Up @@ -79,15 +79,8 @@ void update_svm(uint32_t phase, uint32_t voltage)

// This runs at 80000000/8192 = 9765.625Hz
void DMA1_Channel1_IRQHandler(void) {
i1 = (adc_data[0] - 31710)/5242.88;
i2 = (adc_data[1] - 31795)/5242.88;

// Calculate instantaneous total current
total_current = sqrtf(2*(i1*i1+i2*i2+i1*i2));

// Calculate fixed voltage drop based on current and known resistance (8 ohm)
// Scale RMS to peak voltage
float resistive_waste = (total_current / 3 * sqrt(2)) * 8;
i1 = adc_data[0] - 32840;
i2 = adc_data[1] - 32840;

// 10308 = 1Hz
frequency = 10308 * 5;
Expand Down Expand Up @@ -115,19 +108,8 @@ int main() {
uart_write_int(i1*1000);
uart_write_string(",");
uart_write_int(i2*1000);
uart_write_string(",");
uart_write_int(total_current*1000);
//uart_write_string(",");
//uart_write_int(adc_data[3]);
// uart_write_int(i3);
// uart_write_string(",");
// uart_write_int(iangle);
// uart_write_string(",");
// uart_write_int(vangle);
// uart_write_string(",");
// uart_write_int(i3);
uart_write_nl();
int n; for(n=0;n<1000000;n++) nop();
int n; for(n=0;n<10000;n++) nop();

}
}
20 changes: 9 additions & 11 deletions system.c
Original file line number Diff line number Diff line change
Expand Up @@ -73,8 +73,8 @@ void SystemInit() {
// Disable USART2
USART2->CR1 = 0;
// Set data rate
USART2->BRR = 694; //115200
//USART2->BRR = 80; //1M
//USART2->BRR = 694; //115200
USART2->BRR = 80; //1M
// Enable USART2
USART2->CR1 |= USART_CR1_UE;
// Enable transmit
Expand Down Expand Up @@ -113,13 +113,13 @@ void SystemInit() {
//ADC1->DIFSEL |= (1<<5);
//ADC2->DIFSEL |= (1<<5);

// Calibrate
// ADC1->CR |= ADC_CR_ADCAL;
// ADC2->CR |= ADC_CR_ADCAL;
// while(ADC1->CR & ADC_CR_ADCAL);
// while(ADC2->CR & ADC_CR_ADCAL);
// // Wait a bit
// for(n=0;n<100000;n++) nop();
Calibrate
ADC1->CR |= ADC_CR_ADCAL;
ADC2->CR |= ADC_CR_ADCAL;
while(ADC1->CR & ADC_CR_ADCAL);
while(ADC2->CR & ADC_CR_ADCAL);
// Wait a bit
for(n=0;n<100000;n++) nop();

// Enable procedure
ADC1->ISR |= ADC_ISR_ADRDY;
Expand All @@ -132,8 +132,6 @@ void SystemInit() {
// Sequence
ADC1->SQR1 = (1<<6) | (3<<12) | 1;
ADC2->SQR1 = (2<<6) | (4<<12) | 1;
//ADC1->SMPR1 = (3<<0) | (3<<1) | (3<<2);
//ADC2->SMPR1 = (3<<0) | (3<<1) | (3<<2);

// Oversampling (16x)
ADC1->CFGR2 = (3<<2) | 1;
Expand Down

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