fix: tim clock source

ch32-rs · May 5, 2024 · ce0b75d · ce0b75d
1 parent 8beab2c
commit ce0b75d
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Showing 9 changed files with 20 additions and 18 deletions.
diff --git a/data/family/CH32V0.yaml b/data/family/CH32V0.yaml
@@ -129,15 +129,17 @@
       register: APB2PRSTR
       field: IOPDRST
 
+# TIM use hclk as bus clock
+
 - name: TIM1
   address: 0x40012C00
   registers:
     kind: timer
     version: v3
     block: ADTM
   rcc:
-    bus_clock: PCLK2
-    kernel_clock: PCLK2
+    bus_clock: HCLK
+    kernel_clock: HCLK
     enable:
       register: APB2PCENR
       field: TIM1EN
@@ -279,8 +281,8 @@
     version: v3
     block: GPTM
   rcc:
-    bus_clock: PCLK1
-    kernel_clock: PCLK1
+    bus_clock: HCLK
+    kernel_clock: HCLK
     enable:
       register: APB1PCENR
       field: TIM2EN

diff --git a/data/peripherals/FV2x_V3x_ADV_TIM1.yaml b/data/peripherals/FV2x_V3x_ADV_TIM1.yaml
@@ -5,7 +5,7 @@
     version: v3
     block: ADTM
   rcc:
-    bus_clock: PCLK2
+    bus_clock: PCLK2_TIM
     kernel_clock: PCLK2
     enable:
       register: APB2PCENR

diff --git a/data/peripherals/FV2x_V3x_ADV_TIM8910.yaml b/data/peripherals/FV2x_V3x_ADV_TIM8910.yaml
@@ -5,7 +5,7 @@
     version: v3
     block: ADTM
   rcc:
-    bus_clock: PCLK2
+    bus_clock: PCLK2_TIM
     kernel_clock: PCLK2
     enable:
       register: APB2PCENR
@@ -56,7 +56,7 @@
     version: v3
     block: ADTM
   rcc:
-    bus_clock: PCLK2
+    bus_clock: PCLK2_TIM
     kernel_clock: PCLK2
     enable:
       register: APB2PCENR
@@ -117,7 +117,7 @@
     version: v3
     block: ADTM
   rcc:
-    bus_clock: PCLK2
+    bus_clock: PCLK2_TIM
     kernel_clock: PCLK2
     enable:
       register: APB2PCENR

diff --git a/data/peripherals/FV2x_V3x_BASIC_TIM67.yaml b/data/peripherals/FV2x_V3x_BASIC_TIM67.yaml
@@ -8,7 +8,7 @@
     version: v3
     block: BCTM
   rcc:
-    bus_clock: PCLK1
+    bus_clock: PCLK1_TIM
     kernel_clock: PCLK1
     enable:
       register: APB1PCENR
@@ -27,7 +27,7 @@
     version: v3
     block: BCTM
   rcc:
-    bus_clock: PCLK1
+    bus_clock: PCLK1_TIM
     kernel_clock: PCLK1
     enable:
       register: APB1PCENR

diff --git a/data/peripherals/FV2x_V3x_GP16_TIM234.yaml b/data/peripherals/FV2x_V3x_GP16_TIM234.yaml
@@ -5,7 +5,7 @@
     version: v3
     block: GPTM
   rcc:
-    bus_clock: PCLK1
+    bus_clock: PCLK1_TIM
     kernel_clock: PCLK1
     enable:
       register: APB1PCENR
@@ -56,7 +56,7 @@
     version: v3
     block: GPTM
   rcc:
-    bus_clock: PCLK1
+    bus_clock: PCLK1_TIM
     kernel_clock: PCLK1
     enable:
       register: APB1PCENR
@@ -103,7 +103,7 @@
     version: v3
     block: GPTM
   rcc:
-    bus_clock: PCLK1
+    bus_clock: PCLK1_TIM
     kernel_clock: PCLK1
     enable:
       register: APB1PCENR

diff --git a/data/peripherals/FV2x_V3x_GP16_TIM5.yaml b/data/peripherals/FV2x_V3x_GP16_TIM5.yaml
@@ -5,7 +5,7 @@
     version: v3
     block: GPTM
   rcc:
-    bus_clock: PCLK1
+    bus_clock: PCLK1_TIM
     kernel_clock: PCLK1
     enable:
       register: APB1PCENR

diff --git a/data/peripherals/FV2x_V3x_GP32_TIM5.yaml b/data/peripherals/FV2x_V3x_GP32_TIM5.yaml
@@ -5,7 +5,7 @@
     version: v3
     block: GPTM32
   rcc:
-    bus_clock: PCLK1
+    bus_clock: PCLK1_TIM
     kernel_clock: PCLK1
     enable:
       register: APB1PCENR

diff --git a/data/peripherals/V1x_GP16_TIM23.yaml b/data/peripherals/V1x_GP16_TIM23.yaml
@@ -5,7 +5,7 @@
     version: v3
     block: GPTM
   rcc:
-    bus_clock: PCLK1
+    bus_clock: PCLK1_TIM
     kernel_clock: PCLK1
     enable:
       register: APB1PCENR
@@ -56,7 +56,7 @@
     version: v3
     block: GPTM
   rcc:
-    bus_clock: PCLK1
+    bus_clock: PCLK1_TIM
     kernel_clock: PCLK1
     enable:
       register: APB1PCENR

diff --git a/data/peripherals/V1x_V2x_ADV_TIM1.yaml b/data/peripherals/V1x_V2x_ADV_TIM1.yaml
@@ -7,7 +7,7 @@
     version: v3
     block: ADTM
   rcc:
-    bus_clock: PCLK2
+    bus_clock: PCLK2_TIM
     kernel_clock: PCLK2
     enable:
       register: APB2PCENR