Merge pull request #34 from chipsec/release/"Update to

Update to release/1.12.6
chipsec · Dec 19, 2023 · 4fea720 · 4fea720
2 parents 9429123 + e7b9b1b
commit 4fea720
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diff --git a/_modules/chipsec/cfg/parsers/core_parsers.html b/_modules/chipsec/cfg/parsers/core_parsers.html
diff --git a/_modules/chipsec/config.html b/_modules/chipsec/config.html
diff --git a/_modules/chipsec/fuzzing/primitives.html b/_modules/chipsec/fuzzing/primitives.html
diff --git a/_modules/chipsec/hal/acpi.html b/_modules/chipsec/hal/acpi.html
diff --git a/_modules/chipsec/hal/acpi_tables.html b/_modules/chipsec/hal/acpi_tables.html
diff --git a/_modules/chipsec/hal/cmos.html b/_modules/chipsec/hal/cmos.html
diff --git a/_modules/chipsec/hal/cpu.html b/_modules/chipsec/hal/cpu.html
diff --git a/_modules/chipsec/hal/cpuid.html b/_modules/chipsec/hal/cpuid.html
@@ -0,0 +1,179 @@
+<!DOCTYPE html>
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+<html lang="en" data-content_root="../../../">
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+    <meta charset="utf-8" />
+    <meta name="viewport" content="width=device-width, initial-scale=1.0" />
+    <title>chipsec.hal.cpuid &#8212; CHIPSEC  documentation</title>
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+  <h1>Source code for chipsec.hal.cpuid</h1><div class="highlight"><pre>
+<span></span><span class="c1"># CHIPSEC: Platform Security Assessment Framework</span>
+<span class="c1"># Copyright (c) 2010-2021, Intel Corporation</span>
+<span class="c1">#</span>
+<span class="c1"># This program is free software; you can redistribute it and/or</span>
+<span class="c1"># modify it under the terms of the GNU General Public License</span>
+<span class="c1"># as published by the Free Software Foundation; Version 2.</span>
+<span class="c1">#</span>
+<span class="c1"># This program is distributed in the hope that it will be useful,</span>
+<span class="c1"># but WITHOUT ANY WARRANTY; without even the implied warranty of</span>
+<span class="c1"># MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</span>
+<span class="c1"># GNU General Public License for more details.</span>
+<span class="c1">#</span>
+<span class="c1"># You should have received a copy of the GNU General Public License</span>
+<span class="c1"># along with this program; if not, write to the Free Software</span>
+<span class="c1"># Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.</span>
+<span class="c1">#</span>
+<span class="c1"># Contact information:</span>
+<span class="c1"># [email protected]</span>
+<span class="c1">#</span>
+
+<span class="sd">&quot;&quot;&quot;</span>
+<span class="sd">CPUID information</span>
+
+<span class="sd">usage:</span>
+<span class="sd">    &gt;&gt;&gt; cpuid(0)</span>
+<span class="sd">&quot;&quot;&quot;</span>
+
+<span class="kn">from</span> <span class="nn">typing</span> <span class="kn">import</span> <span class="n">Tuple</span>
+<span class="kn">from</span> <span class="nn">chipsec.hal</span> <span class="kn">import</span> <span class="n">hal_base</span>
+<span class="kn">from</span> <span class="nn">chipsec.logger</span> <span class="kn">import</span> <span class="n">logger</span>
+
+
+<div class="viewcode-block" id="CpuID">
+<a class="viewcode-back" href="../../../modules/chipsec.hal.cpuid.html#chipsec.hal.cpuid.CpuID">[docs]</a>
+<span class="k">class</span> <span class="nc">CpuID</span><span class="p">(</span><span class="n">hal_base</span><span class="o">.</span><span class="n">HALBase</span><span class="p">):</span>
+
+    <span class="k">def</span> <span class="fm">__init__</span><span class="p">(</span><span class="bp">self</span><span class="p">,</span> <span class="n">cs</span><span class="p">):</span>
+        <span class="nb">super</span><span class="p">(</span><span class="n">CpuID</span><span class="p">,</span> <span class="bp">self</span><span class="p">)</span><span class="o">.</span><span class="fm">__init__</span><span class="p">(</span><span class="n">cs</span><span class="p">)</span>
+        <span class="bp">self</span><span class="o">.</span><span class="n">helper</span> <span class="o">=</span> <span class="n">cs</span><span class="o">.</span><span class="n">helper</span>
+
+<div class="viewcode-block" id="CpuID.cpuid">
+<a class="viewcode-back" href="../../../modules/chipsec.hal.cpuid.html#chipsec.hal.cpuid.CpuID.cpuid">[docs]</a>
+    <span class="k">def</span> <span class="nf">cpuid</span><span class="p">(</span><span class="bp">self</span><span class="p">,</span> <span class="n">eax</span><span class="p">:</span> <span class="nb">int</span><span class="p">,</span> <span class="n">ecx</span><span class="p">:</span> <span class="nb">int</span><span class="p">)</span> <span class="o">-&gt;</span> <span class="n">Tuple</span><span class="p">[</span><span class="nb">int</span><span class="p">,</span> <span class="nb">int</span><span class="p">,</span> <span class="nb">int</span><span class="p">,</span> <span class="nb">int</span><span class="p">]:</span>
+        <span class="n">logger</span><span class="p">()</span><span class="o">.</span><span class="n">log_hal</span><span class="p">(</span><span class="sa">f</span><span class="s1">&#39;[cpuid] in: EAX=0x</span><span class="si">{</span><span class="n">eax</span><span class="si">:</span><span class="s1">08X</span><span class="si">}</span><span class="s1">, ECX=0x</span><span class="si">{</span><span class="n">ecx</span><span class="si">:</span><span class="s1">08X</span><span class="si">}</span><span class="s1">&#39;</span><span class="p">)</span>
+        <span class="p">(</span><span class="n">eax</span><span class="p">,</span> <span class="n">ebx</span><span class="p">,</span> <span class="n">ecx</span><span class="p">,</span> <span class="n">edx</span><span class="p">)</span> <span class="o">=</span> <span class="bp">self</span><span class="o">.</span><span class="n">helper</span><span class="o">.</span><span class="n">cpuid</span><span class="p">(</span><span class="n">eax</span><span class="p">,</span> <span class="n">ecx</span><span class="p">)</span>
+        <span class="n">logger</span><span class="p">()</span><span class="o">.</span><span class="n">log_hal</span><span class="p">(</span><span class="sa">f</span><span class="s1">&#39;[cpuid] out: EAX=0x</span><span class="si">{</span><span class="n">eax</span><span class="si">:</span><span class="s1">08X</span><span class="si">}</span><span class="s1">, EBX=0x</span><span class="si">{</span><span class="n">ebx</span><span class="si">:</span><span class="s1">08X</span><span class="si">}</span><span class="s1">, ECX=0x</span><span class="si">{</span><span class="n">ecx</span><span class="si">:</span><span class="s1">08X</span><span class="si">}</span><span class="s1">, EDX=0x</span><span class="si">{</span><span class="n">edx</span><span class="si">:</span><span class="s1">08X</span><span class="si">}</span><span class="s1">&#39;</span><span class="p">)</span>
+        <span class="k">return</span> <span class="p">(</span><span class="n">eax</span><span class="p">,</span> <span class="n">ebx</span><span class="p">,</span> <span class="n">ecx</span><span class="p">,</span> <span class="n">edx</span><span class="p">)</span></div>
+
+
+<div class="viewcode-block" id="CpuID.get_proc_info">
+<a class="viewcode-back" href="../../../modules/chipsec.hal.cpuid.html#chipsec.hal.cpuid.CpuID.get_proc_info">[docs]</a>
+    <span class="k">def</span> <span class="nf">get_proc_info</span><span class="p">(</span><span class="bp">self</span><span class="p">):</span>
+        <span class="p">(</span><span class="n">eax</span><span class="p">,</span> <span class="n">_</span><span class="p">,</span> <span class="n">_</span><span class="p">,</span> <span class="n">_</span><span class="p">)</span> <span class="o">=</span> <span class="bp">self</span><span class="o">.</span><span class="n">cpuid</span><span class="p">(</span><span class="mh">0x01</span><span class="p">,</span> <span class="mh">0x00</span><span class="p">)</span>
+        <span class="k">return</span> <span class="n">eax</span></div>
+</div>
+
+</pre></div>
+
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