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1. branch_prediction_hw_models branch_prediction_hw_models Public

   branch prediction models implemented and tested in verilog hdl

   Verilog

2. cache_hw_models cache_hw_models Public

   This repo contains implementation of 3 types of caches implemented and verified in Verilog HDL. Direct-mapped, 2 way associative, 4 way associative.

   Verilog

3. horse_or_human horse_or_human Public

   Built CNN models to classify horse or human from the freely available dataset on tensorflow called "horseorhuman"

   Jupyter Notebook

4. mips_cpu mips_cpu Public

   Implementation of pipelined mips_cpu in both python and verilog HDL. Popular 5-stage method is used.

   Verilog

5. mnist_sw-hw mnist_sw-hw Public

   This repository contains the training of a deep learning model using tensorflow for mnist images and implementing that trained model in verilog. It is tested also.

   Verilog

6. rv_64im rv_64im Public

   This repo contains "RISC V" cpu in Verilog hdl. It's a 64-bit cpu and supports I&M extensions of open source "RISC V" isa.

   Verilog