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new R_OBI branch with bridge fix #5

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Jan 25, 2024
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2 changes: 1 addition & 1 deletion hw/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -2,4 +2,4 @@

https://github.com/esl-epfl/x-heep-femu

d7b7341d2be860289760541477f1009ade953a49
53c56b76e11bb64639ef6a61f54d58e0e6e45583
Binary file modified hw/x_heep.bit
100644 → 100755
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684 changes: 675 additions & 9 deletions hw/x_heep.hwh

Large diffs are not rendered by default.

Original file line number Diff line number Diff line change
@@ -0,0 +1,36 @@
# Copyright 2023 EPFL
# Solderpad Hardware License, Version 2.1, see LICENSE.md for details.
# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
#
# Author: Deniz Kasap - [email protected]

# Import the X-HEEP Python class
from pynq import x_heep

# Load the X-HEEP bitstream
x_heep = x_heep()

# Choose the X-HEEP memory bank
# First bank = 0
# Second bank = 1
# Third bank = 2
# Fourth bank = 3
x_heep.init_r_obi(2)

# Write the memory bank
for a,b in enumerate(range(0,0x00010000,0x00000004)):
data = a ** 2
x_heep.write_r_obi(data, b, 0x00010000)

# Read the memory bank and compare
allMatch = True
for a,b in enumerate(range(0,0x00008000,0x00000004)):
data_read = x_heep.read_r_obi(b, 0x00008000)
if data_read != a**2:
allMatch = False
break

if allMatch:
print("Test Passed!")
else:
print("Test Failed!")
96 changes: 96 additions & 0 deletions sw/arm/jupyter_notebooks/virtual_r_obi_read_and_write.ipynb
Original file line number Diff line number Diff line change
@@ -0,0 +1,96 @@
{
"cells": [
{
"cell_type": "code",
"execution_count": null,
"id": "63f1eaa7",
"metadata": {},
"outputs": [],
"source": [
"# Import the X-HEEP Python class\n",
"from pynq import x_heep"
]
},
{
"cell_type": "code",
"execution_count": null,
"id": "2d224b64",
"metadata": {},
"outputs": [],
"source": [
"# Load the X-HEEP bitstream\n",
"x_heep = x_heep()"
]
},
{
"cell_type": "code",
"execution_count": null,
"id": "d6af7d95",
"metadata": {},
"outputs": [],
"source": [
"# Choose the X-HEEP memory bank\n",
"# First bank = 0\n",
"# Second bank = 1\n",
"# Third bank = 2\n",
"# Fourth bank = 3\n",
"x_heep.init_r_obi(2)"
]
},
{
"cell_type": "code",
"execution_count": null,
"id": "75a905c1",
"metadata": {},
"outputs": [],
"source": [
"# Write the memory bank\n",
"for a,b in enumerate(range(0,0x00010000,0x00000004)):\n",
" data = a ** 2\n",
" x_heep.write_r_obi(data, b, 0x00010000)"
]
},
{
"cell_type": "code",
"execution_count": null,
"id": "45f6330e",
"metadata": {},
"outputs": [],
"source": [
"# Read the memory bank and compare\n",
"allMatch = True\n",
"for a,b in enumerate(range(0,0x00008000,0x00000004)):\n",
" data_read = x_heep.read_r_obi(b, 0x00008000)\n",
" if data_read != a**2:\n",
" allMatch = False\n",
" break\n",
" \n",
"if allMatch:\n",
" print(\"Test Passed!\")\n",
"else:\n",
" print(\"Test Failed!\")"
]
}
],
"metadata": {
"kernelspec": {
"display_name": "Python 3 (ipykernel)",
"language": "python",
"name": "python3"
},
"language_info": {
"codemirror_mode": {
"name": "ipython",
"version": 3
},
"file_extension": ".py",
"mimetype": "text/x-python",
"name": "python",
"nbconvert_exporter": "python",
"pygments_lexer": "ipython3",
"version": "3.10.4"
}
},
"nbformat": 4,
"nbformat_minor": 5
}
32 changes: 28 additions & 4 deletions sw/arm/sdk/x_heep_api.py
Original file line number Diff line number Diff line change
Expand Up @@ -11,10 +11,12 @@
import sys
import csv

ADC_OFFSET = 0x40000000
FLASH_AXI_ADDRESS_ADDER_OFFSET = 0x43C00000
OBI_AXI_ADDRESS_ADDER_OFFSET = 0x43C10000
PERFORMANCE_COUNTERS_OFFSET = 0x43C20000
ADC_OFFSET = 0x40000000
FLASH_AXI_ADDRESS_ADDER_OFFSET = 0x43C00000
OBI_AXI_ADDRESS_ADDER_OFFSET = 0x43C10000
PERFORMANCE_COUNTERS_OFFSET = 0x43C20000
R_OBI_AXI_BRIDGE_OFFSET = 0x43C30000
R_OBI_BAA_AXI_ADDRESS_ADDER_OFFSET = 0x43C40000

class x_heep(Overlay):

Expand Down Expand Up @@ -161,6 +163,28 @@ def read_obi_mem(self, obi):
return list(obi)


def init_r_obi(self, memory_bank_id):

# Write reverse OBI memory base address to AXI address adder
axi_address_adder = MMIO(R_OBI_BAA_AXI_ADDRESS_ADDER_OFFSET, 0x4)
axi_address_adder.write(0x0, 0x00008000 * memory_bank_id)


def write_r_obi(self, data, offset, width):

# Write reverse OBI
reverse_obi_bridge = MMIO(R_OBI_AXI_BRIDGE_OFFSET, width)
reverse_obi_bridge.write(offset, data)


def read_r_obi(self, offset, width):

# Read reverse OBI
reverse_obi_bridge = MMIO(R_OBI_AXI_BRIDGE_OFFSET, width)
data_read = reverse_obi_bridge.read(offset)
return data_read


def init_perf_cnt(self):

# Map performance counters
Expand Down