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Signed-off-by: Unai Martinez-Corral <[email protected]>
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umarcor committed Mar 23, 2022
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<span class="underline">How it works</span>
</h2>
<p class="diagrams__paragraph_intro">
To understand how F4PGA works, it is best to start with an overview of <br />
the general EDA tooling ecosystem and then proceed to see what <br />
the F4PGA project consists of.
To understand how F4PGA works, it is best to start with an overview of the general <br />
EDA tooling ecosystem and then proceed to see what the F4PGA project consists of. <br />
See: <a href="https://f4pga.readthedocs.io/en/latest/how.html">f4pga.readthedocs.io: How it works</a>.
</p>
<div class="diagrams__diagram" id="eda-ecosystem">
<h3 class="diagram__header">
EDA Tooling Ecosystem
</h3>
<div class="diagrams__content">
<div class="diagrams__paragraph">
<p>
For both ASIC- and FPGA-oriented EDA tooling,
there are three major areas:
</p>
<ul>
<li> hardware description </li>
<li> frontend </li>
<li> backend </li>
</ul>
</div>
<p class="diagrams__paragraph">
While there are a number of open hardware description languages, such as
Verilog, VHDL, Chisel, Migen and Amaranth HDL, the frontend and backend
tooling has been lacking established standard, vendor-neutral solutions.
F4PGA focuses on filling this gap.
</p>
</div>
<div class="diagram__diagram">
<img src="assets/img/EDA.svg" alt="" />
</div>
</div>
<div class="diagrams__diagram" id="structure">
<h3 class="diagram__header">
F4PGA project structure
</h3>
<div class="diagrams__content">
<p class="diagrams__paragraph">
To become a complete FOSS FPGA toolchain, F4PGA needs a number of
tools and projects to be in place to provide an end-to-end flow.
Thus, F4PGA serves as an umbrella framework for several activities,
the central of which focuses on the creation of FPGA
F4PGA Architecture Definitions, i.e. documentation of how specific
FPGAs work internally.
</p>
<p class="diagrams__paragraph">
Those definitions and serve as input to backend tools like nextpnr and
Verilog to Routing, and frontend tools like Yosys. They are created
within separate collaborating projects targeting different FPGAs -
<a href="https://github.com/F4PGA/prjxray">Project X-Ray</a> for Xilinx 7-Series,
<a href="https://github.com/F4PGA/icestorm">Project IceStorm</a> for Lattice iCE40 and
<a href="https://github.com/F4PGA/prjtrellis">Project Trellis</a> for Lattice ECP5 FPGAs.
</p>
</div>
<div class="diagram__diagram">
<img src="assets/img/parts.svg" />
</div>
</div>
<h3 class="diagram__header">
Current status
</h3>
<div class="diagram__diagram">
<div class="diagram__status">
<div class="diagram__container">
<table class="diagram__table">
<thead>
<tr>
<td></td>
<td>
<a class="diagram__link" href="https://github.com/F4PGA/icestorm">
Project Icestorm
</a>
</td>
<td>
<a class="diagram__link" href="https://github.com/F4PGA/prjtrellis">
Project Trellis
</a>
</td>
<td>
<a class="diagram__link" href="https://github.com/F4PGA/prjxray">
Project X-Ray
</a>
</td>
<td>
<a class="diagram__link" href="https://www.quicklogic.com/products/eos-s3/">
QuickLogic Database
</a>
</td>
</tr>
</thead>
<tbody>
<tr>
<td>
Basic&nbsp;Tiles:
<ul>
<li>Logic</li>
<li>Block&nbsp;RAM</li>
</ul>
</td>
<!-- icestorm -->
<td>
<img class="icon icon--large" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
</td>
<!-- trellis -->
<td>
<img class="icon icon--large" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
</td>
<!-- x-ray -->
<td>
<img class="icon icon--large" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/partial.svg" alt="" />
</td>
<!-- quicklogic -->
<td>
<img class="icon icon--large" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
</td>
</tr>
<tr>
<td>
Advanced&nbsp;Tiles:
<ul>
<li>DSP</li>
<li>Hard&nbsp;Blocks</li>
<li>Clock&nbsp;Tiles</li>
<li>IO&nbsp;Tiles</li>
</ul>
</td>
<!-- icestorm -->
<td>
<img class="icon icon--large" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
</td>
<!-- trellis -->
<td>
<img class="icon icon--large" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
</td>
<!-- x-ray -->
<td>
<img class="icon icon--large" src="assets/img/partial.svg" alt="" />
<img class="icon icon--small" src="assets/img/cross.svg" alt="" />
<img class="icon icon--small" src="assets/img/cross.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
</td>
<!-- quicklogic -->
<td>
<img class="icon icon--large" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
</td>
</tr>
<tr>
<td>
Routing:
<ul>
<li>Logic</li>
<li>Clock</li>
</ul>
</td>
<td>
<!-- icestorm -->
<img class="icon icon--large" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
</td>
<!-- trellis -->
<td>
<img class="icon icon--large" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
</td>
<!-- x-ray -->
<td>
<img class="icon icon--large" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
</td>
<!-- quicklogic -->
<td>
<img class="icon icon--large" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
<img class="icon icon--small" src="assets/img/tick.svg" alt="" />
</td>
</tr>
</tbody>
</table>
</div>
</div>
</div>
</section>

<section class="row subprojects" id="subprojects">
<h2 class="row__header subprojects__header">
<span class="underline"> Supported Architectures</span>
</h2>
<div class="subprojects__tiles">
<div class="subproject__tile">
<div class="subproject__details">
<h4>Xilinx 7-Series </h4>
<p class="subproject__description">
The most popular Xilinx <br /> FPGA family
</p>
<a class="subproject__more inline-link" target="_blank"
href="https://www.xilinx.com/video/fpga/7-series-fpga-overview.html">learn more</a>
</div>
</div>

<div class="subproject__tile">
<div class="subproject__details">
<h4>Lattice ice40 </h4>
<p class="subproject__description">
World's smallest FPGAs <br /> for mobile devices
</p>
<a class="subproject__more inline-link" target="_blank"
href="http://www.latticesemi.com/iCE40">learn more</a>
</div>
</div>

<div class="subproject__tile">
<div class="subproject__details">
<h4>Lattice ecp5 </h4>
<p class="subproject__description">
Low cost FPGAs with <br /> high performance features
</p>
<a class="subproject__more inline-link" target="_blank"
href="https://www.latticesemi.com/Products/FPGAandCPLD/ECP5">learn more</a>
</div>
</div>
</div>

<div class="subprojects__tiles">

<div class="subproject__tile">
<div class="subproject__details">
<h4>QuickLogic EOS S3</h4>
<p class="subproject__description">
FPGA + CPU <br /> sensor processing platform
</p>
<a class="subproject__more inline-link" target="_blank"
href="https://www.quicklogic.com/products/eos-s3/">learn more
</a>
</div>
</div>

<div class="subproject__tile">
<div class="subproject__details">
<h4>QuickLogic QLF K4N8</h4>
<p class="subproject__description">
A 24x24 eFPGA with <br /> 6144 flip-flops, 4608 LUT4s, <br /> adder and shift-register support
</p>
<a class="subproject__more inline-link" target="_blank"
href="https://www.quicklogic.com/products/efpga/efpga-ip-software/">learn more
</a>
</div>
</div>

<div class="subproject__tile">
<div class="subproject__details">
<h4>Do you want to <br /> add more?</h4>
<p class="subproject__description">Help us!</p>
<a class="subproject__more inline-link" href="developers.html">learn more</a>
</div>
</div>

</div>
</section>

<section class="row boards" id="boards">
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