(Debugged) Add parallel_slib_r_nc_async for epackA

cgyro/src/cgyro_nl_comm.F90

@@ -326,9 +326,9 @@ subroutine cgyro_nl_fftw_comm1_r_triad(ij)
   real :: dv,dvr,dvp,rval,rval2
   complex :: cprod,cprod2,thfac
 
-  triad_loc_old(:,:,:,3)=triad_loc(:,:,:,3)
-  triad_loc_old(:,:,:,4)=triad_loc(:,:,:,4)
-  triad_loc(:,:,:,:)=0.0
+  triad_loc_old(:,:,nt1:nt2,3) = triad_loc(:,:,nt1:nt2,3)
+  triad_loc_old(:,:,nt1:nt2,4) = triad_loc(:,:,nt1:nt2,4)
+  triad_loc(:,:,nt1:nt2,:) = 0.0
 
   call timer_lib_in('nl_comm')
   call parallel_slib_r_nc_wait(nsplitA,fA_nl,fpackA,fA_req)

cgyro/src/cgyro_nl_fftw.F90

@@ -1429,7 +1429,7 @@ subroutine cgyro_nl_fftw(ij)
 
   include 'fftw3.f03'
 
-  if (triad_print_flag == 1 .and. ij == 4) then
+  if (triad_print_flag == 1 .and. ij == 3) then
    i_triad=1
   endif
 
@@ -1589,6 +1589,9 @@ subroutine cgyro_nl_fftw(ij)
   ! start the async reverse comm
   ! can reuse the same req, no overlap with forward fA_req
   call parallel_slib_r_nc_async(nsplitA,fA_nl,fpackA,fA_req)
+   if (i_triad == 1) then
+     call parallel_slib_r_nc_async(nsplitA,eA_nl,epackA,eA_req)
+   end if
   fA_req_valid = .TRUE.
 
   if (nsplitB > 0) then

cgyro/src/cgyro_rhs.F90

@@ -35,7 +35,7 @@ subroutine cgyro_rhs_r_comm_async(ij)
   integer, intent(in) :: ij
 
   if (nonlinear_flag == 1) then
-     if (triad_print_flag == 1 .and. ij == 4) then
+     if (triad_print_flag == 1 .and. ij == 3) then
         call cgyro_nl_fftw_comm1_r_triad(ij)
      else
         call cgyro_nl_fftw_comm1_r(ij)

f2py/pygacode/cgyro/data_plot_single.py

@@ -85,6 +85,14 @@
 
    head,x,y1,y2 = data_in.plot_phi(xin)
 
+elif plot_type == 'triad':
+
+   head = data_in.plot_triad(xin)
+
+elif plot_type == 'triad_v2':
+
+   head = data_in.plot_triad_v2(xin)
+
 elif plot_type == 'flux':
 
    if ftype == 'nox' or ftype == 'dump':