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plat-k3: Add initial support for AM62Lx SoC
AM62Lx newest among on the K3 class of SoCs designed to be low footprint system where DDR can be as small as 128M. Hence, move the DDR location to the beginning of DDR right after TF-A. Disable TI SCI, secure boot info and HW unique ID support for now, they will be incrementally at later point in time as the underlying communication layer is different than AM62x. Signed-off-by: Vignesh Raghavendra <[email protected]> Acked-by: Jerome Forissier <[email protected]> Reviewed-by: Dhruva Gole <[email protected]>
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