[Clang][XTHeadVector] implement 12.13 vwmaccu/vwmacc/vwmaccsu/vwmaccus (

ruyisdk#87) * [Clang][XTHeadVector] implement 12.13 `vwmaccu/vwmacc/vwmaccsu/vwmaccus` * [Clang][XTHeadVector] test 12.13 `vwmaccu/vwmacc/vwmaccsu/vwmaccus`
imkiva · Apr 1, 2024 · 27a7d8d · 27a7d8d
1 parent e68650a
commit 27a7d8d
Show file tree

Hide file tree

Showing 5 changed files with 1,308 additions and 0 deletions.
diff --git a/clang/include/clang/Basic/riscv_vector_xtheadv.td b/clang/include/clang/Basic/riscv_vector_xtheadv.td
@@ -61,6 +61,10 @@ multiclass RVVOp0Op1BuiltinSet<string intrinsic_name, string type_range,
                                list<list<string>> suffixes_prototypes>
     : RVVBuiltinSet<intrinsic_name, type_range, suffixes_prototypes, [0, 1]>;
 
+multiclass RVVOutOp1Op2BuiltinSet<string intrinsic_name, string type_range,
+                                  list<list<string>> suffixes_prototypes>
+    : RVVBuiltinSet<intrinsic_name, type_range, suffixes_prototypes, [-1, 1, 2]>;
+
 multiclass RVVSignedBinBuiltinSet
     : RVVOutOp1BuiltinSet<NAME, "csil",
                           [["vv", "v", "vvv"],
@@ -1122,6 +1126,22 @@ let MaskedPolicyScheme = NonePolicy,
 }
 
 // 12.13. Vector Widening Integer Multiply-Add Operations
+let MaskedPolicyScheme = NonePolicy,
+    UnMaskedPolicyScheme = NonePolicy,
+    HasMaskedOffOperand = false,
+    Log2LMUL = [-3, -2, -1, 0, 1, 2] in {
+  defm th_vwmaccu : RVVOutOp1Op2BuiltinSet<"th_vwmaccu", "csi",
+                                           [["vv", "Uw", "UwUwUvUv"],
+                                            ["vx", "Uw", "UwUwUeUv"]]>;
+  defm th_vwmacc : RVVOutOp1Op2BuiltinSet<"th_vwmacc", "csi",
+                                          [["vv", "w", "wwvv"],
+                                           ["vx", "w", "wwev"]]>;
+  defm th_vwmaccsu : RVVOutOp1Op2BuiltinSet<"th_vwmaccsu", "csi",
+                                            [["vv", "w", "wwvUv"],
+                                             ["vx", "w", "wweUv"]]>;
+  defm th_vwmaccus : RVVOutOp1Op2BuiltinSet<"th_vwmaccus", "csi",
+                                            [["vx", "w", "wwUev"]]>;
+}
 
 // 12.14. Vector Integer Merge Operations