CI workflow for SystemVerilog syntax checking

.github/workflows/check_verilog.yml

@@ -0,0 +1,95 @@
+name: check-verilog
+
+on:
+  workflow_dispatch:
+  push:
+    branches:
+      - master
+  pull_request:
+    branches:
+      - master
+
+env:
+  CIRCT_VERSION: 1.72.0
+  CIRCT_ARCHIVE: "circt-full-shared-linux-x64.tar.gz"
+  DEPENDENCIES_DIR: "deps"
+  MLIR_TARGETS_PATH: "lib/cmake/mlir/MLIRTargets.cmake"
+  BUILD_DIR: "build"
+  UTOPIA_EXECUTABLE: "src/umain"
+  MODULE_OUTPUT_PATH: "output.sv"
+  LIBRARY_OUTPUT_PATH: "lib.sv"
+
+jobs:
+  build-and-parse-verilog:
+    strategy:
+      matrix:
+        kernel: [polynomial2, scalar3, matrixmul2, muxmul, addconst, movingsum]
+        config: [1]
+        include:
+          - kernel: polynomial2
+            config: 2
+          - kernel: movingsum
+            config: 2
+
+    runs-on: ubuntu-latest
+    steps:
+      - name: Check out repository code
+        uses: actions/checkout@v4
+
+      - name: Download APT dependencies
+        run: |
+          sudo apt update
+          sudo apt install build-essential clang cmake g++ gcc liblpsolve55-dev lld make ninja-build libctemplate-dev verilator
+
+      - name: Download and configure CIRCT & LLVM
+        env:
+          CIRCT_SOURCE: "https://github.com/llvm/circt/releases/download/firtool-${{env.CIRCT_VERSION}}/${{env.CIRCT_ARCHIVE}}"
+          CIRCT_DIR: "firtool-${{env.CIRCT_VERSION}}"
+        run: |
+          mkdir "${{env.DEPENDENCIES_DIR}}"
+          cd "${{env.DEPENDENCIES_DIR}}"
+          wget "${{env.CIRCT_SOURCE}}"
+          tar -xvf "${{env.CIRCT_ARCHIVE}}"
+          sed -i 's'/\
+          'foreach(_target "LLVMSupport" "LLVMCore" "LLVMMC" "LLVMTarget" "LLVMAsmParser" "LLVMBinaryFormat" '\
+          '"LLVMBitReader" "LLVMBitWriter" "LLVMFrontendOpenMP" "LLVMTransformUtils" "LLVMTargetParser" "LLVMIRReader" '\
+          '"LLVMipo" "LLVMLinker" "LLVMPasses" "LLVMMCParser" "LLVMLineEditor" "LLVMTableGen" "LLVMCoroutines" "LLVMExecutionEngine" '\
+          '"LLVMObject" "LLVMOrcJIT" "LLVMJITLink" "LLVMAnalysis" "LLVMAggressiveInstCombine" "LLVMInstCombine" "LLVMScalarOpts" '\
+          '"LLVMVectorize" "LLVMX86CodeGen" "LLVMX86Desc" "LLVMX86Info" "LLVMX86AsmParser" "LLVMX86Disassembler" "CIRCTAffineToLoopSchedule" '\
+          '"CIRCTArcToLLVM" "CIRCTCalyxToFSM" "CIRCTCalyxToHW" "CIRCTCalyxNative" "CIRCTCombToArith" "CIRCTCombToLLVM" "CIRCTCombToSMT" '\
+          '"CIRCTConvertToArcs" "CIRCTDCToHW" "CIRCTExportChiselInterface" "CIRCTExportVerilog" "CIRCTFIRRTLToHW" "CIRCTFSMToSV" '\
+          '"CIRCTHandshakeToDC" "CIRCTHandshakeToHW" "CIRCTHWArithToHW" "CIRCTHWToLLHD" "CIRCTHWToLLVM" "CIRCTHWToBTOR2" "CIRCTHWToSMT" '\
+          '"CIRCTHWToSV" "CIRCTHWToSystemC" "CIRCTLLHDToLLVM" "CIRCTLoopScheduleToCalyx" "CIRCTMooreToCore" "CIRCTPipelineToHW" "CIRCTSCFToCalyx" '\
+          '"CIRCTSeqToSV" "CIRCTSimToSV" "CIRCTCFToHandshake" "CIRCTVerifToSMT" "CIRCTVerifToSV" "CIRCTExportFIRRTL" "CIRCTComb" '\
+          '"CIRCTCombTransforms" "CIRCTDebug" "CIRCTESI" "CIRCTFIRRTL" "CIRCTImportFIRFile" "CIRCTMSFT" "CIRCTMSFTTransforms" "CIRCTHW" '\
+          '"CIRCTLLHD" "CIRCTMoore" "CIRCTOM" "CIRCTOMEvaluator" "CIRCTSeq" "CIRCTSeqTransforms" "CIRCTSV" "CIRCTSVTransforms" "CIRCTFSM" '\
+          '"CIRCTFSMTransforms" "CIRCTHandshake" "CIRCTHandshakeTransforms" "CIRCTHWArith" "CIRCTVerif" "CIRCTLTL" "CIRCTEmit" "CIRCTFirtool" )'\
+          /\
+          'foreach(_target "LLVMSupport" "LLVMCore" "LLVMMC" "LLVMTarget" "LLVMAsmParser" "LLVMBinaryFormat" "LLVMBitReader" "LLVMBitWriter" '\
+          '"LLVMFrontendOpenMP" "LLVMTransformUtils" "LLVMTargetParser" "LLVMIRReader" "LLVMipo" "LLVMLinker" "LLVMPasses" "LLVMMCParser" '\
+          '"LLVMLineEditor" "LLVMTableGen" "LLVMCoroutines" "LLVMExecutionEngine" "LLVMObject" "LLVMOrcJIT" "LLVMJITLink" "LLVMAnalysis" '\
+          '"LLVMAggressiveInstCombine" "LLVMInstCombine" "LLVMScalarOpts" "LLVMVectorize" "LLVMX86CodeGen" "LLVMX86Desc" "LLVMX86Info" '\
+          '"LLVMX86AsmParser" "LLVMX86Disassembler")/' "${{env.CIRCT_DIR}}/${{env.MLIR_TARGETS_PATH}}"
+          cd "${{github.workspace}}"
+
+      - name: Configure Utopia HLS build
+        env:
+          CIRCT_DIR: "firtool-${{env.CIRCT_VERSION}}"
+        run: |
+          cmake -S . -B "${{env.BUILD_DIR}}" -G Ninja -DCMAKE_CXX_COMPILER=clang++ \
+          -DCMAKE_PREFIX_PATH="${{github.workspace}}/${{env.DEPENDENCIES_DIR}}/${{env.CIRCT_DIR}}" \
+          -DSRC_FILES="${{github.workspace}}/examples/${{matrix.kernel}}/${{matrix.kernel}}.cpp"
+
+      - name: Build Utopia HLS
+        run: |
+          cmake --build "${{env.BUILD_DIR}}"
+
+      - name: Run SystemVerilog modules generation
+        run: |
+          "${{env.BUILD_DIR}}/${{env.UTOPIA_EXECUTABLE}}" hls --config \
+          "${{github.workspace}}/examples/${{matrix.kernel}}/${{matrix.kernel}}_${{matrix.config}}.json" \
+          -l --out-sv "${{env.MODULE_OUTPUT_PATH}}" --out-sv-lib "${{env.LIBRARY_OUTPUT_PATH}}"
+
+      - name: Run Verilator
+        run: |
+          verilator --lint-only -Wall -Wno-DECLFILENAME "${{env.MODULE_OUTPUT_PATH}}" "${{env.LIBRARY_OUTPUT_PATH}}"

README.md

@@ -276,7 +276,7 @@ For example, given subdirectory `polynomial2`, the compilation and execution com
 ```bash
 cmake -S . -B build -G Ninja -DCMAKE_PREFIX_PATH=~/firtool-1.72.0 -DSRC_FILES="~/utopia-hls/examples/polynomial2/polynomial2.cpp"
 cmake --build build
-build/src/umain hls --config examples/polynomial2/polynomial2.json -a --out-sv output
+build/src/umain hls --config examples/polynomial2/polynomial2_1.json -a --out-sv output
 ```
 
 ## DFCxx Documentation

examples/movingsum/movingsum_2.json

@@ -0,0 +1,3 @@
+{
+  "ADD_INT": 8
+}

examples/polynomial2/polynomial2_2.json

@@ -0,0 +1,4 @@
+{
+  "MUL_INT": 15,
+  "ADD_INT": 8
+}