Initial source file

Makefile

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+
+include Makefile.nandchip.config
+include Makefile.storage.config
+include Makefile.firmware.config
+
+# select configuration functions
+get_config   =$(strip $(filter-out  --$(1),$(subst =, , $(filter  --$(1)=%,$(all_config)))))
+
+CROSS_COMPILE_DIR =
+ARCH          	?= arm
+CROSS_COMPILE 	?= arm-none-eabi-
+AS           	= $(CROSS_COMPILE_DIR)$(CROSS_COMPILE)as 
+LD           	= $(CROSS_COMPILE_DIR)$(CROSS_COMPILE)ld
+CC           	= $(CROSS_COMPILE_DIR)$(CROSS_COMPILE)gcc 
+CXX          	= $(CROSS_COMPILE_DIR)$(CROSS_COMPILE)g++
+CPP          	= $(CROSS_COMPILE_DIR)$(CROSS_COMPILE)cpp
+AR           	= $(CROSS_COMPILE_DIR)$(CROSS_COMPILE)ar
+NM           	= $(CROSS_COMPILE_DIR)$(CROSS_COMPILE)nm
+STRIP        	= $(CROSS_COMPILE_DIR)$(CROSS_COMPILE)strip
+OBJCOPY      	= $(CROSS_COMPILE_DIR)$(CROSS_COMPILE)objcopy
+OBJDUMP      	= $(CROSS_COMPILE_DIR)$(CROSS_COMPILE)objdump
+CROSS_FLAGS  	= -target arm-none-eabi -mfloat-abi=soft -I/usr/lib/gcc/arm-none-eabi/4.9.3/include -I/usr/lib/gcc/arm-none-eabi/4.9.3/include-fixed -I/usr/lib/gcc/arm-none-eabi/4.9.3/../../../arm-none-eabi/include -fshort-enums
+CFLAGS 			= -I . -I$(SRC_FOLDER)/../include -I $(hw_driver_path) -include $(SRC_FOLDER)/global.h -std=gnu11 -Wall -Werror
+CXXFLAGS     	= -lunistd -I . -fno-exceptions -std=gnu11 -Wall
+ASFLAGS      	= -EL 
+
+
+BUILD_FOLDER 	:=$(PWD)/build
+SRC_FOLDER	 	:=$(PWD)/firmware
+
+# select a default configuration if not speicfied in make command
+ifeq ($(config),) 
+    config :=H4k_N4k_256mb
+endif
+all_config   	:=$($(config)) 
+CONFIG_FLAGS 	:=$(subst --,-D, $(all_config)) $(VERBOSE_EXECUTION_FLAGS)
+buff_manager 	:=$(call get_config ,write_back_cache_mgt)
+ftl 		 	:=$(call get_config ,mapping_scheme)
+hardware 		:=$(call get_config ,hardware)
+
+hw_driver_path	:=$(SRC_FOLDER)/hw_$(hardware)
+hw_driver_lib	:=$(hw_driver_path)/libdrivers.a
+ftl_module_path :=$(SRC_FOLDER)/ftl_$(ftl)
+ftl_module_lib 	:=$(BUILD_FOLDER)/$(config)_ftl.a 
+firmware	 	:=$(BUILD_FOLDER)/$(config)_firmware.elf 
+kernel_objs	 	:= issd_kernel issd_kernel_mem_alloc 
+util_objs	 	:= util.memcp util.uart_print util.containers
+base_objs 	 	:= nvme_driver host_dma buffer_mgt_$(buff_manager) low_level_nand_io isp
+OBJS 		 	=
+OBJS 			+=$(foreach OBJ,$(kernel_objs), ${BUILD_FOLDER}/$(config)_$(OBJ).o)
+OBJS 		 	+=$(foreach OBJ,$(util_objs), ${BUILD_FOLDER}/$(config)_$(OBJ).o)
+OBJS 		 	+=$(foreach OBJ,$(base_objs), ${BUILD_FOLDER}/$(config)_$(OBJ).o)
+linker_script 	:=$(SRC_FOLDER)/linkerS.ld
+
+
+all: show_config directory ftl_module_lib $(firmware)
+
+show_config:
+	@#echo $(config): { $(all_config) }  
+
+
+.PHONY: directory
+directory: ${BUILD_FOLDER}
+${BUILD_FOLDER}  :
+	mkdir -p ${BUILD_FOLDER}
+
+
+$(firmware): $(hw_driver_lib) $(ftl_module_lib) $(OBJS) 
+	@echo  "  LD: $@"
+	@$(CC) -nostartfiles -Xlinker -T$(linker_script) $(map_tables) $(OBJS) $(hw_driver_lib) $(ftl_module_lib) -o $@
+
+$(hw_driver_lib) :
+	@cd $(hw_driver_path) ; make 
+
+ftl_module_lib :	
+	@cd $(ftl_module_path) ; \
+	make CC=$(CC) CFLAGS="$(CFLAGS)" AR=$(AR) \
+	BUILD_FOLDER="$(BUILD_FOLDER)" SRC_FOLDER="$(SRC_FOLDER)" \
+	config=$(config) CONFIG_FLAGS="$(CONFIG_FLAGS)" VERBOSE_FLAGS="$(VERBOSE_FLAGS)" 
+
+
+${BUILD_FOLDER}/$(config)_%.o : $(SRC_FOLDER)/%.c   ;
+	@echo "   $(notdir $@)"
+	@$(CC) -g -c $(CFLAGS) $(CONFIG_FLAGS) $(VERBOSE_FLAGS) $< -o $@ 
+
+
+clean: 
+	rm -f -r $(BUILD_FOLDER)/$(config)_*
+
+cleanall : clean ;
+	@cd $(hw_driver_path) ; make clean 
+
+
+
+# running the simulation
+
+ifeq ($(cpu),o3)
+    cpu_mode:=--cpu-type=arm_detailed
+else
+	cpu_mode:=--cpu-type=timing
+endif
+
+cpu_cores		:=--num-cpus=4
+cache_config	:=--caches --l2cache --l1d_size=32kB --l1i_size=32kB --l1d_assoc=4  --l1i_assoc=4 --l2_size=512kB --l2_assoc=8 --cacheline_size=64 
+dram_config		:=--mem-size=512MB
+run_cmd 		:=SSD_hw_platforms/gem5/gem5-stable_2015_09_03/build/ARM/gem5.fast --outdir=m5out SSD_hw_platforms/gem5/issd_fs_mcore.py $(cpu_cores) $(cpu_mode) $(cache_config) $(dram_config)
+gem5_config 	:= $(filter  --nand_%,$(all_config))
+HOST_FILE_PID 	:=simulators/qemu_pid
+
+run : directory  $(BootLoader) $(firmware) ;
+	#rm -f ${HOST_FILE_PID} ; sync 
+	#export HOST_FILE_PID=${HOST_FILE_PID} ; ./starthost.sh 
+	export M5_PATH="~/share/tom/isp_issd/simulators/gem5_dep" ; $(run_cmd) --kernel=$(firmware) --issd_bootloader=SSD_hw_platforms/gem5/bootloader.mp_cpu $(gem5_config)
+	#./stophost.sh 
+
+
+
+
+
+

Makefile.firmware.config

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+
+
+
+pg_map:= \
+	--host_page_size=12 \
+	--write_back_cache_mgt=1wbc-r \
+	--mapping_scheme=page_mapping \
+	--num_namespaces=1 \
+	--over_provision_factor=7 
+
+
+bk_map:= \
+	--host_page_size=12 \
+	--write_back_cache_mgt=1wbc_4rc \
+	--mapping_scheme=block_mapping \
+	--num_namespaces=1 \
+	--over_provision_factor=7 \
+	--victim_selection_window=4 
+
+
+
+
+# sample configuration conbinations 
+
+H4k_N4k_256mb 	:= $(mlc) $(256image) $(pg_map) --hardware=armv7-a_gem5_generic 
+2mb8			:= $(mlc) $(254.8ch)  $(pg_map)  
+2mbbk			:= $(mlc) $(256image) $(bk_map)
+2mbbk8			:= $(mlc) $(254.8ch)  $(bk_map)
+2mbslc 			:= $(slc) $(256image) $(pg_map) 
+1gig 			:= $(mlc) $(1gig.8ch) $(pg_map) 
+
+
+# 	enable verbose configuration
+
+VERBOSE_EXECUTION_FLAGS	=
+VERBOSE_EXECUTION_FLAGS	+= -DVERBOSE_ERROR
+VERBOSE_EXECUTION_FLAGS	+= -DVERBOSE_STARTUP_SHUTDOWN
+#VERBOSE_EXECUTION_FLAGS	+= -DVERBOSE_CPU_SCHEDULE
+VERBOSE_EXECUTION_FLAGS	+= -DVERBOSE_NVME_ADMIN
+#VERBOSE_EXECUTION_FLAGS	+= -DVERBOSE_NVME_DOOR_BELL
+#VERBOSE_EXECUTION_FLAGS	+= -DVERBOSE_NVME_IO
+#VERBOSE_EXECUTION_FLAGS	+= -DVERBOSE_NVME_IO_DETAILED
+#VERBOSE_EXECUTION_FLAGS	+= -DVERBOSE_PAGE_BUFFER_MGT
+#VERBOSE_EXECUTION_FLAGS	+= -DVERBOSE_FTL
+#VERBOSE_EXECUTION_FLAGS	+= -DVERBOSE_FTL_DETAILED
+#VERBOSE_EXECUTION_FLAGS	+= -DVERBOSE_TRIM
+#VERBOSE_EXECUTION_FLAGS	+= -DVERBOSE_GC
+#VERBOSE_EXECUTION_FLAGS	+= -DVERBOSE_WEAR_LEVELING
+#VERBOSE_EXECUTION_FLAGS	+= -DVERBOSE_NAND_IO
+#VERBOSE_EXECUTION_FLAGS	+= -DVERBOSE_NAND_IO_DETAILED
+#VERBOSE_EXECUTION_FLAGS	+= -DVERBOSE_HOST_DMA
+#VERBOSE_EXECUTION_FLAGS	+= -DVERBOSE_HOST_DMA_DETAILED
+VERBOSE_EXECUTION_FLAGS	+= -DVERBOSE_ISP_BIN_DOWNLOAD
+VERBOSE_EXECUTION_FLAGS	+= -DVERBOSE_ISP_IO
+VERBOSE_EXECUTION_FLAGS	+= -DVERBOSE_ISP_IO_DETAILED
+
+
+
+
+
+

Makefile.nandchip.config

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+
+
+# generic SLC latencies 
+slc := \
+	--nand_type=slc \
+	--nand_ltcy_rcmd_issue=5us \
+	--nand_ltcy_pcmd_issue=5us \
+	--nand_ltcy_ecmd_issue=5us \
+	--nand_ltcy_read_page=25us \
+	--nand_ltcy_program_page=200us \
+	--nand_ltcy_erase_block=2ms \
+
+
+# generic MLC latencies 
+mlc := \
+	--nand_type=mlc \
+	--nand_ltcy_rcmd_issue=5us \
+	--nand_ltcy_pcmd_issue=5us \
+	--nand_ltcy_ecmd_issue=5us \
+	--nand_ltcy_read_msb_page=50us \
+	--nand_ltcy_read_lsb_page=50us \
+	--nand_ltcy_program_msb_page=600us \
+	--nand_ltcy_program_lsb_page=900us \
+	--nand_ltcy_erase_block=3ms \
+
+
+# generic TLC latencies 
+tlc := \
+	--nand_type=tlc \
+	--nand_ltcy_rcmd_issue=5us \
+	--nand_ltcy_pcmd_issue=5us \
+	--nand_ltcy_ecmd_issue=5us \
+	--nand_ltcy_read_msb_page=75us \
+	--nand_ltcy_read_csb_page=75us \
+	--nand_ltcy_read_lsb_page=75us \
+	--nand_ltcy_program_msb_page=900us \
+	--nand_ltcy_program_csb_page=1200us \
+	--nand_ltcy_program_lsb_page=1500us \
+	--nand_ltcy_erase_block=5ms \
+
+
+# generic QLC latencies 
+qlc := \
+	--nand_type=qlc \
+	--nand_ltcy_rcmd_issue=5us \
+	--nand_ltcy_pcmd_issue=5us \
+	--nand_ltcy_ecmd_issue=5us \
+	--nand_ltcy_read_msb_page=100us \
+	--nand_ltcy_read_chsb_page=100us \
+	--nand_ltcy_read_clsb_page=100us \
+	--nand_ltcy_read_lsb_page=100us \
+	--nand_ltcy_program_msb_page=1500us \
+	--nand_ltcy_program_chsb_page=1800us \
+	--nand_ltcy_program_clsb_page=2100us \
+	--nand_ltcy_program_lsb_page=2400us \
+	--nand_ltcy_erase_block=6ms \
+
+
+
+

Makefile.storage.config

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+
+
+
+## Config for 256MB Image
+
+256image:= \
+	--nand_num_chn=4 \
+	--nand_pkgs_per_chn=2 \
+	--nand_dies_per_pkg=2  \
+	--nand_planes_per_die=2 \
+	--nand_blocks_per_plane=16 \
+	--nand_pages_per_block=128 \
+	--nand_page_size=12 \
+	--nand_storage_image=storage_images/ssd_image.256 
+
+256image_16k:= \
+	--nand_num_chn=4 \
+	--nand_pkgs_per_chn=2 \
+	--nand_dies_per_pkg=2  \
+	--nand_planes_per_die=2 \
+	--nand_blocks_per_plane=4 \
+	--nand_pages_per_block=32 \
+	--nand_page_size=14 \
+	--nand_storage_image=storage_images/ssd_image.256 	
+
+254.8ch:= \
+	--nand_num_chn=8 \
+	--nand_pkgs_per_chn=2 \ 
+	--nand_dies_per_pkg=2  \
+	--nand_planes_per_die=2 \
+	--nand_blocks_per_plane=4 \
+	--nand_pages_per_block=64 \
+	--nand_page_size=12 \
+	--nand_storage_image=storage_images/ssd_image.256 
+
+
+## Config for 1GB Image
+
+1gig.8ch:= \
+	--nand_num_chn=8 \
+	--nand_pkgs_per_chn=2 \ 
+	--nand_dies_per_pkg=2  \
+	--nand_planes_per_die=2 \
+	--nand_blocks_per_plane=8 \
+	--nand_pages_per_block=64 \
+	--nand_page_size=12 \
+	--nand_storage_image=storage_images/ssd_image.1gig \
+
+
+
+
+
+

SSD_hw_platforms/gem5/extra_sim_objects/SConscript

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+
+
+Import('*')
+
+if env['TARGET_ISA'] == 'arm':
+
+    SimObject('iSSD.py')
+
+    #    Host Interface 
+    Source('iSSDHostInterface.cc')
+    #Source('../../../../../../intelligent_ssd.cc')
+    DebugFlag('iSSDHostInterface')
+    DebugFlag('iSSDCtrlRegAccess')
+    DebugFlag('iSSDHostIntCmds')
+    DebugFlag('iSSDHostRead')
+    DebugFlag('iSSDHostWrite')
+
+    #	Nand Controller 
+    Source('iSSDNandCtrl.cc')
+    DebugFlag('iSSDNandCtrl')
+    DebugFlag('iSSDNandCtrlOP')
+
+    #	Statistic output 	
+    Source('iSSDStats.cc')
+
+