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2 changes: 1 addition & 1 deletion
2
modules/Nncase.Modules.CPU/CodeGen/CPU/Templates/Kernels/Transpose.cshtml
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@model Nncase.CodeGen.CPU.TypedKernelTemplateModel<Nncase.TIR.CPU.Transpose> | ||
@{ | ||
} | ||
transpose<fixed_shape<@string.Join(",", Model.Target.Perm)>>(@Html.Raw(Model.Arguments[0].Symbol.Name), @Html.Raw(Model.Arguments[1].Symbol.Name)); | ||
@(Model.Indent)transpose<fixed_shape<@string.Join(",", Model.Target.Perm)>>(@Html.Raw(Model.Arguments[0].Symbol.Name), @Html.Raw(Model.Arguments[1].Symbol.Name)); |
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// Copyright (c) Canaan Inc. All rights reserved. | ||
// Licensed under the Apache license. See LICENSE file in the project root for full license information. | ||
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using Google.OrTools.ConstraintSolver; | ||
using Nncase.Evaluator; | ||
using Nncase.IR; | ||
using Nncase.Schedule; | ||
using Nncase.TIR.CPU; | ||
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namespace Nncase.Evaluator.TIR.CPU; | ||
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public sealed class ReduceEvaluator : ITypeInferencer<Reduce> | ||
public sealed class ReduceEvaluator : ITypeInferencer<Reduce>, IKernelInfoEvaluator<Reduce> | ||
{ | ||
public IRType Visit(ITypeInferenceContext context, Reduce target) | ||
{ | ||
context.CheckArgumentType<TensorType>(target, Reduce.Input); | ||
context.CheckArgumentType<TensorType>(target, Reduce.Output); | ||
return TupleType.Void; | ||
} | ||
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public MicroKernelInfo Visit(Reduce op, MicroKernelContext context) | ||
{ | ||
var domain = context.AccessMaps[0].Domains; | ||
var primitives = Enumerable.Repeat(1, domain.Length).ToArray(); | ||
var multipliers = Enumerable.Repeat(new ValueRange<int>(1, int.MaxValue), domain.Length).ToArray(); | ||
var bufferInfos = new MicroKernelBufferInfo[context.BufferShapes.Length]; | ||
var opt = (ICpuTargetOptions)context.TargetOptions; | ||
bufferInfos[0] = new(opt.MemoryBandWidths[1], opt.MemoryBandWidths[1], MicroKernelBufferInfo.BufferState.Read); | ||
bufferInfos[1] = new(opt.MemoryBandWidths[1], opt.MemoryBandWidths[1], MicroKernelBufferInfo.BufferState.Write); | ||
return new MicroKernelInfo(primitives, multipliers, bufferInfos, GetComputeCycle); | ||
} | ||
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private static IntExpr GetComputeCycle(IntExpr[][] bufferShapes, Solver solver, MicroKernelContext context) | ||
{ | ||
var factor = System.Math.Min(context.BufferShapes[0][^1], 32); | ||
return factor * (1 + solver.MakeIsLessVar(bufferShapes[0][^1], solver.MakeIntConst(factor))); | ||
} | ||
} |
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// Copyright (c) Canaan Inc. All rights reserved. | ||
// Licensed under the Apache license. See LICENSE file in the project root for full license information. | ||
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using Google.OrTools.ConstraintSolver; | ||
using Nncase.Evaluator; | ||
using Nncase.IR; | ||
using Nncase.Schedule; | ||
using Nncase.TIR.CPU; | ||
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namespace Nncase.Evaluator.TIR.CPU; | ||
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public sealed class TransposeEvaluator : ITypeInferencer<Transpose> | ||
public sealed class TransposeEvaluator : ITypeInferencer<Transpose>, IKernelInfoEvaluator<Transpose> | ||
{ | ||
public IRType Visit(ITypeInferenceContext context, Transpose target) | ||
{ | ||
context.CheckArgumentType<TensorType>(target, Transpose.Input); | ||
context.CheckArgumentType<TensorType>(target, Transpose.Output); | ||
return TupleType.Void; | ||
} | ||
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public MicroKernelInfo Visit(Transpose op, MicroKernelContext context) | ||
{ | ||
var domain = context.AccessMaps[0].Domains; | ||
var primitives = Enumerable.Repeat(1, domain.Length).ToArray(); | ||
var multipliers = Enumerable.Repeat(new ValueRange<int>(1, int.MaxValue), domain.Length).ToArray(); | ||
var bufferInfos = new MicroKernelBufferInfo[context.BufferShapes.Length]; | ||
var opt = (ICpuTargetOptions)context.TargetOptions; | ||
bufferInfos[0] = new(opt.MemoryBandWidths[1], opt.MemoryBandWidths[1], MicroKernelBufferInfo.BufferState.Read); | ||
bufferInfos[1] = new(opt.MemoryBandWidths[1], opt.MemoryBandWidths[1], MicroKernelBufferInfo.BufferState.Write); | ||
return new MicroKernelInfo(primitives, multipliers, bufferInfos, GetComputeCycle); | ||
} | ||
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private static IntExpr GetComputeCycle(IntExpr[][] bufferShapes, Solver solver, MicroKernelContext context) | ||
{ | ||
var factor = System.Math.Min(context.BufferShapes[0][^1], 32); | ||
return factor * (1 + solver.MakeIsLessVar(bufferShapes[0][^1], solver.MakeIntConst(factor))); | ||
} | ||
} |
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68 changes: 68 additions & 0 deletions
68
modules/Nncase.Modules.CPU/Passes/Rules/CPU/Affine/LowerReduce.cs
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// Copyright (c) Canaan Inc. All rights reserved. | ||
// Licensed under the Apache license. See LICENSE file in the project root for full license information. | ||
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using Nncase.IR; | ||
using Nncase.IR.Affine; | ||
using Nncase.PatternMatch; | ||
using Nncase.Targets; | ||
using static Nncase.IR.TypePatternUtility; | ||
using static Nncase.PatternMatch.Utility; | ||
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namespace Nncase.Passes.Rules.CPU.Affine; | ||
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[RuleGenerator] | ||
public partial class LowerReduce : RewriteRule<Pattern> | ||
{ | ||
public LowerReduce(string moduleKind = CPUTarget.Kind) | ||
{ | ||
ModuleKind = moduleKind; | ||
} | ||
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public string ModuleKind { get; } | ||
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public override Pattern Pattern { get; } = IsCall( | ||
"call", | ||
IsOp<IR.CPU.PackedReduce>("op"), | ||
IsWildcard("input") with { TypePattern = HasShape(s => s.Rank > 0 && s.IsFixed, "tileable") }); | ||
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private Expr? GetReplace(Expr call, IR.CPU.PackedReduce op, Expr input) | ||
{ | ||
var inputShape = input.CheckedShape.ToValueArray(); | ||
var rank = inputShape.Length; | ||
var domains = IR.F.Affine.Domains(rank); | ||
var outrank = call.CheckedShape.Rank; | ||
var results = new AffineRange[outrank]; | ||
{ | ||
var j = 0; | ||
for (int i = 0; i < rank; i++) | ||
{ | ||
if (op.Axes.Contains(i)) | ||
{ | ||
if (op.KeepDims == true) | ||
{ | ||
results[j++] = new AffineRange(0, 1); | ||
} | ||
} | ||
else | ||
{ | ||
results[j++] = new AffineRange(domains[i].Offset, domains[i].Extent); | ||
} | ||
} | ||
} | ||
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var affinemap = new AffineMap(domains, default, results); | ||
var outBuffer = call.CheckedType switch | ||
{ | ||
TensorType t => IR.F.Buffer.Uninitialized(t.DType, TIR.MemoryLocation.Data, t.Shape.ToValueArray()), | ||
DistributedType dt => IR.F.Buffer.Uninitialized(dt.TensorType.DType, TIR.MemoryLocation.Data, dt.TensorType.Shape.ToValueArray(), dt.NdSBP, dt.Placement), | ||
_ => throw new ArgumentOutOfRangeException(nameof(call)), | ||
}; | ||
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return IR.F.Affine.Grid(ModuleKind) | ||
.Domain(rank, out var _) | ||
.Read(input, AffineMap.Identity(rank), out var intile) | ||
.Write(outBuffer, affinemap, out var outTile) | ||
.Body(TIR.F.CPU.Reduce(intile, outTile, op.PackedAxes.ToArray(), op.PadedNums.ToArray(), op.Axes, op.KeepDims, op.ReduceOp)) | ||
.Build(); | ||
} | ||
} |
54 changes: 54 additions & 0 deletions
54
modules/Nncase.Modules.CPU/Passes/Rules/CPU/Affine/LowerTranspose.cs
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// Copyright (c) Canaan Inc. All rights reserved. | ||
// Licensed under the Apache license. See LICENSE file in the project root for full license information. | ||
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using Nncase.IR; | ||
using Nncase.IR.Affine; | ||
using Nncase.IR.Math; | ||
using Nncase.PatternMatch; | ||
using Nncase.Targets; | ||
using static Nncase.IR.TypePatternUtility; | ||
using static Nncase.PatternMatch.Utility; | ||
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namespace Nncase.Passes.Rules.CPU.Affine; | ||
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[RuleGenerator] | ||
public partial class LowerTranspose : RewriteRule<Pattern> | ||
{ | ||
public LowerTranspose(string moduleKind = CPUTarget.Kind) | ||
{ | ||
ModuleKind = moduleKind; | ||
} | ||
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public string ModuleKind { get; } | ||
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public override Pattern Pattern { get; } = PatternMatch.F.Tensors.IsTranspose("trans", "call", IsWildcard("input"), IsTensorConst("perm")) | ||
with | ||
{ TypePattern = HasShape(s => s.Rank > 0 && s.IsFixed, "tileable") }; | ||
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private Expr? GetReplace(Expr call, Expr input, int[] perm) | ||
{ | ||
var inputShape = input.CheckedShape.ToValueArray(); | ||
var rank = inputShape.Length; | ||
var domains = IR.F.Affine.Domains(rank); | ||
var results = new AffineRange[rank]; | ||
for (int i = 0; i < rank; i++) | ||
{ | ||
results[perm[i]] = new AffineRange(domains[i].Offset, domains[i].Extent); | ||
} | ||
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var inputAccessMap = new AffineMap(domains, default, results); | ||
var outBuffer = call.CheckedType switch | ||
{ | ||
TensorType t => IR.F.Buffer.Uninitialized(t.DType, TIR.MemoryLocation.Data, t.Shape.ToValueArray()), | ||
DistributedType dt => IR.F.Buffer.Uninitialized(dt.TensorType.DType, TIR.MemoryLocation.Data, dt.TensorType.Shape.ToValueArray(), dt.NdSBP, dt.Placement), | ||
_ => throw new ArgumentOutOfRangeException(nameof(call)), | ||
}; | ||
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return IR.F.Affine.Grid(ModuleKind) | ||
.Domain(rank, out var _) | ||
.Read(input, inputAccessMap, out var intile) | ||
.Write(outBuffer, AffineMap.Identity(rank), out var outTile) | ||
.Body(TIR.F.CPU.Transpose(intile, outTile, perm)) | ||
.Build(); | ||
} | ||
} |
64 changes: 64 additions & 0 deletions
64
modules/Nncase.Modules.CPU/Passes/Rules/CPU/Affine/LowerUnpack.cs
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// Copyright (c) Canaan Inc. All rights reserved. | ||
// Licensed under the Apache license. See LICENSE file in the project root for full license information. | ||
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using Nncase.IR; | ||
using Nncase.IR.Affine; | ||
using Nncase.IR.Math; | ||
using Nncase.PatternMatch; | ||
using Nncase.Targets; | ||
using static Nncase.IR.TypePatternUtility; | ||
using static Nncase.PatternMatch.Utility; | ||
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namespace Nncase.Passes.Rules.CPU.Affine; | ||
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[RuleGenerator] | ||
public partial class LowerUnpack : RewriteRule<Pattern> | ||
{ | ||
public LowerUnpack(string moduleKind = CPUTarget.Kind) | ||
{ | ||
ModuleKind = moduleKind; | ||
} | ||
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public string ModuleKind { get; } | ||
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public override Pattern Pattern { get; } = IsCall( | ||
"call", | ||
IsOp<IR.CPU.Unpack>("op"), | ||
IsWildcard("input") with { TypePattern = HasShape(s => s.Rank > 0 && s.IsFixed, "tileable") }); | ||
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private Expr? GetReplace(Expr call, IR.CPU.Unpack op, Expr input) | ||
{ | ||
var inputShape = input.CheckedShape.ToValueArray(); | ||
var rank = inputShape.Length; | ||
var domains = IR.F.Affine.Domains(rank); | ||
var results = new AffineRange[rank]; | ||
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for (int axis = 0; axis < rank; axis++) | ||
{ | ||
// e.g. f32[128,256] -> f32<4>[32,256] | ||
if (op.Axes.IndexOf(axis) is int i && i != -1) | ||
{ | ||
results[axis] = new AffineRange(op.Lanes[i] * domains[axis].Offset, op.Lanes[i] * domains[axis].Extent); | ||
} | ||
else | ||
{ | ||
results[axis] = new AffineRange(domains[axis].Offset, domains[axis].Extent); | ||
} | ||
} | ||
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var affinemap = new AffineMap(domains, default, results); | ||
var outBuffer = call.CheckedType switch | ||
{ | ||
TensorType t => IR.F.Buffer.Uninitialized(t.DType, TIR.MemoryLocation.Data, t.Shape.ToValueArray()), | ||
DistributedType dt => IR.F.Buffer.Uninitialized(dt.TensorType.DType, TIR.MemoryLocation.Data, dt.TensorType.Shape.ToValueArray(), dt.NdSBP, dt.Placement), | ||
_ => throw new ArgumentOutOfRangeException(nameof(call)), | ||
}; | ||
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return IR.F.Affine.Grid(ModuleKind) | ||
.Domain(rank, out var _) | ||
.Read(input, AffineMap.Identity(rank), out var intile) | ||
.Write(outBuffer, affinemap, out var outTile) | ||
.Body(TIR.F.CPU.Unpack(intile, outTile, op.Lanes, op.Axes)) | ||
.Build(); | ||
} | ||
} |
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