WiP: t480 boots without known regressions #1906

tlaurion · 2025-02-11T18:46:08Z

Disclaimer: This PR picks https://review.coreboot.org/c/coreboot/+/83274 and patches added by libreboot as coreboot 24.12 release commit as a base. Whatever is not fixed in WiP support of coreboot should be discussed on that patchset.

This PR should build, but is incomplete as of now. This PR is a draft permitting to review under this PR what needs to be changed to have complete t480 support.

It merges the prior work of @akunterkontrolle and @notgivenby and @gaspar-ilom from #1885 and #1907

From notes under #1885 (comment)

My total 10h contribution (and counting) for now is at https://github.com/tlaurion/heads/tree/poc_t480

Combines the three separated efforts:
- https://github.com/notgivenby/heads/tree/board_t480
https://github.com/akunterkontrolle/heads/tree/board_t480
https://github.com/gaspar-ilom/heads/tree/t480
signs commits with my key (co-authoring of commits)
fixes crossgcc fetch script to use libreboot mirror
fixes some coreboot config, theoritically working pr0 (to be tested)
fixes t480 board config to use ~~target/t480~~-> adapted https://github.com/gaspar-ilom/heads/tree/t480 work, which calls blobs scripts from targets/xx80_me_blobs.mk
~~fixes blob download script needing to call python directly (nix has environment paths, need to call python, cannot call python script directly)~~ : ‎blobs/xx80/download_clean_deguard_me.sh is used instead from @gaspar-ilom
CircleCI board addition so that we can point to build errors directly and reproducible builds for a specific commit
t480-maximized -> t480: those are not maximized boards; ME is not neutered nor freed spaced reused in coreboot BIOS region. TODO: revisit. A lot of modules are removed, bringing size of ME to 1.1mb?
As of now firewire blob from @notgivenby is not injected in firmware anymore. Do we really want/need it? why?
- review of coreboot configs need review
TPM2 toolstack added in board configs in recent commit (was based on t440p wich is tpm1, missed that, prior, sorry).

TODO:

@gaspar-ilom @notgivenby @akunterkontrolle : test test test and report.
review and comment through https://github.com/linuxboot/heads/pull/1906/files
revisit decision of board names: ME is neutered still reducing size of ME to 1.1mb. This is maximized boards, if we move freed space of ME region to BIOS region in IFD, that is.
Add board testers under BOARD_TESTERS.md, only @gaspar-ilom is there for now.
review if we want to reuse all libreboot patches or select which ones we want to keep in tree
testing from board owners, iterate in commits that are signed and can be cherry-picked from other contributors branches
merge

Signed-off-by: Thierry Laurion <[email protected]>

…for t480 Signed-off-by: Thierry Laurion <[email protected]>

Signed-off-by: Thierry Laurion <[email protected]>

…ce its not sharing the same coreboot buildstack (something 25.X.X, need to check) Signed-off-by: Thierry Laurion <[email protected]>

…ack, since its not sharing the same coreboot buildstack (something 25.X.X, need to check)" This reverts commit b1f279354388fd8e71abd9f1514246d7e9f6ed1c. Hmmm.... WGET="" bin/fetch_coreboot_crossgcc_archive.sh "/home/user/heads/build/x86/coreboot-t480" "binutils" "/home/user/heads/packages/x86" --2025-02-11 14:46:38-- https://ftpmirror.gnu.org/binutils/binutils-2.43.1.tar.xz Resolving ftpmirror.gnu.org (ftpmirror.gnu.org)... 209.51.188.200, 2001:470:142:5::200 Connecting to ftpmirror.gnu.org (ftpmirror.gnu.org)|209.51.188.200|:443... connected. HTTP request sent, awaiting response... 302 Moved Temporarily Location: https://mirror.csclub.uwaterloo.ca/gnu/binutils/binutils-2.43.1.tar.xz [following] --2025-02-11 14:46:40-- https://mirror.csclub.uwaterloo.ca/gnu/binutils/binutils-2.43.1.tar.xz Resolving mirror.csclub.uwaterloo.ca (mirror.csclub.uwaterloo.ca)... 129.97.134.71, 2620:101:f000:4901:c5c:0:f:1055 Connecting to mirror.csclub.uwaterloo.ca (mirror.csclub.uwaterloo.ca)|129.97.134.71|:443... connected. HTTP request sent, awaiting response... 200 OK Length: 28174300 (27M) [text/plain] Saving to: '/home/user/heads/packages/x86/coreboot-crossgcc-binutils-2.43.1.tar.xz.tmp' /home/user/heads/packages/x86/coreboot-crossgcc-binu 100%[=====================================================================================================================>] 26.87M 8.88MB/s in 3.0s 2025-02-11 14:46:44 (8.88 MB/s) - '/home/user/heads/packages/x86/coreboot-crossgcc-binutils-2.43.1.tar.xz.tmp' saved [28174300/28174300] /home/user/heads/packages/x86/coreboot-crossgcc-binutils-2.43.1.tar.xz.tmp: OK touch "/home/user/heads/build/x86/coreboot-t480/.heads-crossgcc-pkg-binutils" WGET="" bin/fetch_coreboot_crossgcc_archive.sh "/home/user/heads/build/x86/coreboot-t480" "gcc" "/home/user/heads/packages/x86" --2025-02-11 14:46:44-- https://ftpmirror.gnu.org/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz Resolving ftpmirror.gnu.org (ftpmirror.gnu.org)... 209.51.188.200, 2001:470:142:5::200 Connecting to ftpmirror.gnu.org (ftpmirror.gnu.org)|209.51.188.200|:443... connected. HTTP request sent, awaiting response... 302 Moved Temporarily Location: https://mirror2.evolution-host.com/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz [following] --2025-02-11 14:46:44-- https://mirror2.evolution-host.com/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz Resolving mirror2.evolution-host.com (mirror2.evolution-host.com)... 167.114.8.249, 2607:5300:60:450d:c259:13f4:6df0:1 Connecting to mirror2.evolution-host.com (mirror2.evolution-host.com)|167.114.8.249|:443... connected. HTTP request sent, awaiting response... 200 OK Length: 92306460 (88M) [application/x-xz] Saving to: '/home/user/heads/packages/x86/coreboot-crossgcc-gcc-14.2.0.tar.xz.tmp' /home/user/heads/packages/x86/coreboot-crossgcc-gcc- 100%[=====================================================================================================================>] 88.03M 32.9MB/s in 2.7s 2025-02-11 14:46:48 (32.9 MB/s) - '/home/user/heads/packages/x86/coreboot-crossgcc-gcc-14.2.0.tar.xz.tmp' saved [92306460/92306460] /home/user/heads/packages/x86/coreboot-crossgcc-gcc-14.2.0.tar.xz.tmp: OK touch "/home/user/heads/build/x86/coreboot-t480/.heads-crossgcc-pkg-gcc" WGET="" bin/fetch_coreboot_crossgcc_archive.sh "/home/user/heads/build/x86/coreboot-t480" "nasm" "/home/user/heads/packages/x86" --2025-02-11 14:46:48-- https://www.nasm.us/pub/nasm/releasebuilds/2.16.03/nasm-2.16.03.tar.bz2 Resolving www.nasm.us (www.nasm.us)... 198.137.202.136, 2607:7c80:54:3::136 Connecting to www.nasm.us (www.nasm.us)|198.137.202.136|:443... connected. HTTP request sent, awaiting response... 200 OK Length: 1361988 (1.3M) [application/x-bzip2] Saving to: '/home/user/heads/packages/x86/coreboot-crossgcc-nasm-2.16.03.tar.bz2.tmp' /home/user/heads/packages/x86/coreboot-crossgcc-nasm 100%[=====================================================================================================================>] 1.30M 2.90MB/s in 0.4s 2025-02-11 14:46:49 (2.90 MB/s) - '/home/user/heads/packages/x86/coreboot-crossgcc-nasm-2.16.03.tar.bz2.tmp' saved [1361988/1361988] /home/user/heads/packages/x86/coreboot-crossgcc-nasm-2.16.03.tar.bz2.tmp: OK touch "/home/user/heads/build/x86/coreboot-t480/.heads-crossgcc-pkg-nasm" WGET="" bin/fetch_coreboot_crossgcc_archive.sh "/home/user/heads/build/x86/coreboot-t480" "iasl" "/home/user/heads/packages/x86" --2025-02-11 14:46:49-- https://distfiles.macports.org/acpica/acpica-unix-20241212.tar.gz Resolving distfiles.macports.org (distfiles.macports.org)... 151.101.138.132 Connecting to distfiles.macports.org (distfiles.macports.org)|151.101.138.132|:443... connected. HTTP request sent, awaiting response... 404 Not Found 2025-02-11 14:46:50 ERROR 404: Not Found. Failed to download https://distfiles.macports.org/acpica/acpica-unix-20241212.tar.gz Try mirrors for coreboot-crossgcc-acpica-unix-20241212.tar.gz --2025-02-11 14:46:50-- https://storage.puri.st/heads-packages/coreboot-crossgcc-acpica-unix-20241212.tar.gz Resolving storage.puri.st (storage.puri.st)... 146.190.140.226 Connecting to storage.puri.st (storage.puri.st)|146.190.140.226|:443... connected. HTTP request sent, awaiting response... 404 Not Found 2025-02-11 14:46:51 ERROR 404: Not Found. Failed to download https://storage.puri.st/heads-packages/coreboot-crossgcc-acpica-unix-20241212.tar.gz --2025-02-11 14:46:51-- https://storage.puri.sm/heads-packages/coreboot-crossgcc-acpica-unix-20241212.tar.gz Resolving storage.puri.sm (storage.puri.sm)... 146.190.140.226 Connecting to storage.puri.sm (storage.puri.sm)|146.190.140.226|:443... connected. HTTP request sent, awaiting response... 404 Not Found 2025-02-11 14:46:52 ERROR 404: Not Found. Failed to download https://storage.puri.sm/heads-packages/coreboot-crossgcc-acpica-unix-20241212.tar.gz Signed-off-by: Thierry Laurion <[email protected]>

…hon when used under nix docker Signed-off-by: Thierry Laurion <[email protected]>

…ls blobs scripts Signed-off-by: Thierry Laurion <[email protected]>

… as base Signed-off-by: Thierry Laurion <[email protected]>

…onfig and config/coreboot-novacustom-nv4x_adl.config Then saved back in oldconfig with ./docker_repro.sh make BOARD=t480-maximized coreboot.modify_and_save_oldconfig_in_place Notes: - Pr0 requirements don't stick, investigate - real quick overview of config, just rying to get thing build here Signed-off-by: Thierry Laurion <[email protected]>

…EURL to use one of libreboot web mirror Signed-off-by: Thierry Laurion <[email protected]>

…ot 24.02 buildstack) Signed-off-by: Thierry Laurion <[email protected]>

…les in tree as per http://web.archive.org/web/20250211155526/https://notgivenby.github.io/heads-wiki/t480-port/#coreboot-config-for-t480 : No joy building, but will dump progress for others to pickup Signed-off-by: Thierry Laurion <[email protected]>

…ake first layer Will fail at Updating git submodules. payloads/external/Makefile.mk:399: "Using host toolchain to build Linuxboot" GEN build.h IFDTOOL -p sklkbl -F t480-maximized/fmap-template.fmd ../../../blobs/t480/ifd_16 HOSTCC cbfstool/fmd_parser.o HOSTCC cbfstool/fmd_scanner.o make[1]: *** No rule to make target '../../../vendorfiles/kabylake/Fsp_M.fd', needed by 't480-maximized/coreboot.pre'. Stop. make[1]: *** Waiting for unfinished jobs.... File ../../../blobs/t480/ifd_16 is 4096 bytes Wrote layout to t480-maximized/fmap-template.fmd Signed-off-by: Thierry Laurion <[email protected]>

…iles exist For repro: - To remove all files created by patches (would error to help dev remove them manually) - echo "bogus" | tee build/x86/coreboot-t480/.canary - sudo rm -rf build/x86/coreboot-t480/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480* - sudo rm build/x86/libgpg-error-1.46/src/syscfg/lock-obj-pub.powerpc64le-unknown-linux-musl.h - Remove all .canary files, outside of detected git forks to speedup local builds, rebuilding only new files with make magic - ./docker_repro.sh make BOARD=t480-maximized real.remove_canary_files-extract_patch_rebuild_what_changed - Rebuild from sources: unpack archives/git clone, patch, build from source - ./docker_repro.sh make BOARD=t480-maximized Signed-off-by: Thierry Laurion <[email protected]>

…ream PR0 patchset https://review.coreboot.org/c/coreboot/+/85278 Repro: git fetch https://review.coreboot.org/coreboot refs/changes/78/85278/3 && git format-patch -1 --stdout FETCH_HEAD > patches/coreboot-t480/85278-post-skylake-pr0.patch Unfortunately Applying patch file : patches/coreboot-t480/85278-post-skylake-pr0.patch Checking patch build/x86/coreboot-t480/src/soc/intel/alderlake/finalize.c... Checking patch build/x86/coreboot-t480/src/soc/intel/cannonlake/finalize.c... Checking patch build/x86/coreboot-t480/src/soc/intel/common/block/lpc/Makefile.mk... Checking patch build/x86/coreboot-t480/src/soc/intel/common/block/smm/smihandler.c... Checking patch build/x86/coreboot-t480/src/soc/intel/common/pch/include/intelpch/lockdown.h... Checking patch build/x86/coreboot-t480/src/soc/intel/common/pch/lockdown/Kconfig... Checking patch build/x86/coreboot-t480/src/soc/intel/common/pch/lockdown/Makefile.mk... Checking patch build/x86/coreboot-t480/src/soc/intel/common/pch/lockdown/lockdown.c... Checking patch build/x86/coreboot-t480/src/soc/intel/common/pch/lockdown/lockdown_lpc.c... Checking patch build/x86/coreboot-t480/src/soc/intel/common/pch/lockdown/lockdown_spi.c... Checking patch build/x86/coreboot-t480/src/soc/intel/denverton_ns/lpc.c... Checking patch build/x86/coreboot-t480/src/soc/intel/elkhartlake/finalize.c... Checking patch build/x86/coreboot-t480/src/soc/intel/jasperlake/finalize.c... Checking patch build/x86/coreboot-t480/src/soc/intel/meteorlake/finalize.c... Checking patch build/x86/coreboot-t480/src/soc/intel/pantherlake/finalize.c... Checking patch build/x86/coreboot-t480/src/soc/intel/skylake/finalize.c... Checking patch build/x86/coreboot-t480/src/soc/intel/tigerlake/finalize.c... Checking patch build/x86/coreboot-t480/src/soc/intel/xeon_sp/finalize.c... Checking patch build/x86/coreboot-t480/src/soc/intel/xeon_sp/lockdown.c... error: while searching for: static void lpc_lockdown_config(void) { /* Set BIOS Interface Lock, BIOS Lock */ lpc_set_bios_interface_lock_down(); /* Only allow writes in SMM */ if (CONFIG(BOOTMEDIA_SMM_BWP)) { lpc_set_eiss(); lpc_enable_wp(); } lpc_set_lock_enable(); } void soc_lockdown_config(int chipset_lockdown) { if (chipset_lockdown == CHIPSET_LOCKDOWN_FSP) return; lpc_lockdown_config(); pmc_lockdown_config(); sata_lockdown_config(chipset_lockdown); spi_lockdown_config(chipset_lockdown); error: patch failed: build/x86/coreboot-t480/src/soc/intel/xeon_sp/lockdown.c:6 Applied patch build/x86/coreboot-t480/src/soc/intel/alderlake/finalize.c cleanly. Applied patch build/x86/coreboot-t480/src/soc/intel/cannonlake/finalize.c cleanly. Applied patch build/x86/coreboot-t480/src/soc/intel/common/block/lpc/Makefile.mk cleanly. Applied patch build/x86/coreboot-t480/src/soc/intel/common/block/smm/smihandler.c cleanly. Applied patch build/x86/coreboot-t480/src/soc/intel/common/pch/include/intelpch/lockdown.h cleanly. Applied patch build/x86/coreboot-t480/src/soc/intel/common/pch/lockdown/Kconfig cleanly. Applied patch build/x86/coreboot-t480/src/soc/intel/common/pch/lockdown/Makefile.mk cleanly. Applied patch build/x86/coreboot-t480/src/soc/intel/common/pch/lockdown/lockdown.c cleanly. Applied patch build/x86/coreboot-t480/src/soc/intel/common/pch/lockdown/lockdown_lpc.c cleanly. Applied patch build/x86/coreboot-t480/src/soc/intel/common/pch/lockdown/lockdown_spi.c cleanly. Applied patch build/x86/coreboot-t480/src/soc/intel/denverton_ns/lpc.c cleanly. Applied patch build/x86/coreboot-t480/src/soc/intel/elkhartlake/finalize.c cleanly. Applied patch build/x86/coreboot-t480/src/soc/intel/jasperlake/finalize.c cleanly. Applied patch build/x86/coreboot-t480/src/soc/intel/meteorlake/finalize.c cleanly. Applied patch build/x86/coreboot-t480/src/soc/intel/pantherlake/finalize.c cleanly. Applied patch build/x86/coreboot-t480/src/soc/intel/skylake/finalize.c cleanly. Applied patch build/x86/coreboot-t480/src/soc/intel/tigerlake/finalize.c cleanly. Applied patch build/x86/coreboot-t480/src/soc/intel/xeon_sp/finalize.c cleanly. Applying patch build/x86/coreboot-t480/src/soc/intel/xeon_sp/lockdown.c with 1 reject... Rejected hunk #1. make: *** [Makefile:570: /home/user/heads/build/x86/coreboot-t480/.canary] Error 1 Will have to edit patch Signed-off-by: Thierry Laurion <[email protected]>

…we are not interested into which are conflicting against coreboot upstream commit 2f1e4e5e8515dd350cc9d68b48d32a5b6b02ae6a Signed-off-by: Thierry Laurion <[email protected]>

…config Signed-off-by: Thierry Laurion <[email protected]>

…herwise build error Signed-off-by: Thierry Laurion <[email protected]>

tlaurion · 2025-02-11T22:13:33Z

002d107 adds PR0 (to be tested) and fix build issues.

time spent total 3h

… after kexec call to final OS. Otherwise, problem with coreboot config) Signed-off-by: Thierry Laurion <[email protected]>

notgivenby · 2025-02-11T23:54:53Z

@tlaurion please delete p from the folder name /boards/t480p-hotp-maximized . It should read t480-hotp-maximized. I believe the "p" was left from t440p.

Signed-off-by: gaspar-ilom <[email protected]>

…d error Signed-off-by: Thierry Laurion <[email protected]>

gaspar-ilom · 2025-02-18T20:39:12Z

Again who else can become a board tester: @akunterkontrolle @notgivenby @MattClifton76 @mblanqui. It would be great to have more people oboard to ensure that we can always test in time. It will make the maintainer's life so much easier! Please add your handle here if you can help with that: https://github.com/tlaurion/heads/blob/f02ab497a1027fb296ca4b78bf0facf5575993b3/BOARD_TESTERS.md?plain=1#L37

gaspar-ilom · 2025-02-18T20:57:46Z

One question: can you see the review comments I added in the code. To me they do not show up when I am not logged-in, but I can see yours. Only realized that now. Why is that? I think @tlaurion you also could not add me to the PR as a reviewer/ asignee. Am I lacking some permissions?

gaspar-ilom · 2025-02-18T21:15:59Z

would

I have started working on this but it is a little bit annoying. I had to write a patch to ifdtool to be able to update the regions with the appropriate layout.

I am not sure it is worth it. It could always be added at a later point in time. Also I dumped the ifd from libreboot and from my board and compared the diff.txt:

In libreboot the OEM section was overwritten with all 1s (I cleaned the output in the diff).
The flash regions are different.
- Obviously, bios and me were resized,
- but also the unused regions are different.
The HAP bit was set by libreboot (needed for deguard).
I am not sure about PCHSTRP0.
FLMSTR{N} seem to be dummy values in libreboot
all access permissions were given.

What do you think?

notgivenby · 2025-02-19T06:27:55Z

Again who else can become a board tester: @akunterkontrolle @notgivenby @MattClifton76 @mblanqui. It would be great to have more people oboard to ensure that we can always test in time. It will make the maintainer's life so much easier!

Please also add the @doritos4mlady (#1885 (comment)).

notgivenby · 2025-02-19T06:29:50Z

@notgivenby please test and report on f02ab49 rom

@tlaurion unfourtunatly the rom did not build. I will try to build locally...

tlaurion · 2025-02-19T14:05:41Z

@notgivenby please test and report on f02ab49 rom

@tlaurion unfourtunatly the rom did not build. I will try to build locally...

There is a race condition, which sometimes happen and sometimes not. Will get to the root of it and report it upstream.
As stated before, crossgcc on 24.12 has issues, as can also be seen under #1908 CircleCI building each boards at https://app.circleci.com/pipelines/github/tlaurion/heads/3141/workflows/77e7a775-2f3a-4aba-a585-71fb020f01f2, which makes 20 boards break because of ADA compiler issue under 24.12 (upstream issue)

TLDR: unless at least race condition in crossgcc build is fixed (with an additional patch landing under patches/coreboot-24.12/*) this PR won't be mergeable, causing master CircleCI builds to fail as experienced here randomly and is a blocker for this PR to be merged)

@gaspar-ilom 9978aa6 contains your latest commit for TPM GPIO issue documentation from tlaurion#16

tlaurion · 2025-02-19T14:08:13Z

One question: can you see the review comments I added in the code. To me they do not show up when I am not logged-in, but I can see yours. Only realized that now. Why is that? I think @tlaurion you also could not add me to the PR as a reviewer/ asignee. Am I lacking some permissions?

@gaspar-ilom I see no comments under https://github.com/linuxboot/heads/pull/1906/files

tlaurion · 2025-02-19T14:11:35Z

#1906 (comment):

I am not sure it is worth it. It could always be added at a later point in time.

@gaspar-ilom
As long as ME is reported deactivated per cbmem -1 | grep ME logs, I have no opinion. Similar discussions happened when porting t440p before and can be revisited. What we want is ifd in tree doing the right thing.

EDIT: PR0 will lock all spi chip from being writeable outside of Heads (OS) as reported correct under #1906 (comment) by @MattClifton76. Everything else are improvements. Ideal, to me, for maintenance, would be to reuse libreboot provided ifd as is (since they neuter ME and modified IFD accordingly) reducing maintenance costs to Heads for this board and reuse prior work and enforce collaboration on porting (where libreboot did the work to provide recipe to have fully working ROMs since they changed libreboot no-blobs policy to minimal blobs policy), making Heads and libreboot compatible in philosophy and making more close collaboration possible.

tlaurion · 2025-02-19T14:27:09Z

On upstream 24.12 crossgcc race condition issue, observable thorugh CircleCI at https://app.circleci.com/pipelines/github/tlaurion/heads/3145/workflows/2f85c9b6-827c-41ec-b9b9-1ea51d4f6432/jobs/62760?invite=true#step-102-28452_97

Feb 19 07:23:56 /root/heads/packages/x86/coreboot-crossgcc-acpica-unix-20241212.tar.gz.tmp: OK
Feb 19 07:23:56 touch "/root/heads/build/x86/coreboot-24.12/.heads-crossgcc-pkg-iasl"
Feb 19 07:23:56 make -C "/root/heads/build/x86/coreboot-24.12" CPUS=36 "crossgcc-i386" \
Feb 19 07:23:56 
Feb 19 07:23:56 make[1]: Entering directory '/root/heads/build/x86/coreboot-24.12'
Feb 19 07:23:56 mkdir -p build/util/kconfig
Feb 19 07:23:56 sed \
Feb 19 07:23:56         -e "s,\$(obj),\$(objk),g" \
Feb 19 07:23:56         -e "s,\$(src),\$(srck),g" \
Feb 19 07:23:56         -e "s,^help:,help_kconfig help::," \
Feb 19 07:23:56         -e "s,^%.config:,__disable__&," \
Feb 19 07:23:56         -e "s,^savedefconfig:,__disable__&," \
Feb 19 07:23:56         -e "s,\$(srctree)/arch/\$(SRCARCH)/configs/\$(KBUILD_DEFCONFIG),\$(KBUILD_DEFCONFIG)," \
Feb 19 07:23:56         -e "s,--defconfig=arch/\$(SRCARCH)/configs/\$(KBUILD_DEFCONFIG),--defconfig=\$(KBUILD_DEFCONFIG)," \
Feb 19 07:23:56         -e "/^unexport CONFIG_$/d" \
Feb 19 07:23:56         /root/heads/build/x86/coreboot-24.12/util/kconfig/Makefile > build/util/kconfig/Makefile.real.tmp
Feb 19 07:23:56 mv build/util/kconfig/Makefile.real.tmp build/util/kconfig/Makefile.real
Feb 19 07:23:56 rm -rf build .xcompile
Feb 19 07:23:56 make -C util/crossgcc build-i386 build_iasl
Feb 19 07:23:56 bash ./buildgcc -p i386-elf -j 36   \
Feb 19 07:23:56                  -d /root/heads/build/x86/coreboot-24.12/util/crossgcc/xgcc
Feb 19 07:23:56 Welcome to the coreboot cross toolchain builder v2024-12-21_306660c2de 
Feb 19 07:23:56 
Feb 19 07:23:56 Building toolchain using 36 thread(s).
Feb 19 07:23:56 
Feb 19 07:23:56 Target architecture is i386-elf
Feb 19 07:23:56 
Feb 19 07:23:56 Found compatible Ada compiler, enabling Ada support by default.
Feb 19 07:23:56 
Feb 19 07:23:56 Downloading and verifying tarballs ...
Feb 19 07:23:56  * gmp-6.3.0.tar.xz (cached)... hash verified (b4043dd2964ab1a858109da85c44de224384f352)
Feb 19 07:23:56  * mpfr-4.2.1.tar.xz (cached)... hash verified (31ffb4244cb469e2b4937cce1f50150300971dfb)
Feb 19 07:23:56  * mpc-1.3.1.tar.gz (cached)... hash verified (bac1c1fa79f5602df1e29e4684e103ad55714e02)
Feb 19 07:23:56  * binutils-2.43.1.tar.xz (cached)... hash verified (86bfee61d18cb9ea84ca700ecb820d97bb4e92a7)
Feb 19 07:23:57  * gcc-14.2.0.tar.xz (cached)... hash verified (d91ecc3d20ce6298bd95f9b09cc51dc6d3c73ae3)
Feb 19 07:23:57 Downloaded tarballs ... ok
Feb 19 07:23:57 Unpacking and patching ...
Feb 19 07:23:57  * gmp-6.3.0.tar.xz
Feb 19 07:23:57    o gmp-6.3.0_generic-build.patch
Feb 19 07:23:57  * mpfr-4.2.1.tar.xz
Feb 19 07:23:57  * mpc-1.3.1.tar.gz
Feb 19 07:23:57  * binutils-2.43.1.tar.xz
Feb 19 07:24:00    o binutils-2.43.1_as-ipxe.patch
Feb 19 07:24:00    o binutils-2.43.1_no-makeinfo.patch
Feb 19 07:24:00  * gcc-14.2.0.tar.xz
Feb 19 07:24:11    o gcc-14.2.0_asan_shadow_offset_callback.patch
Feb 19 07:24:11    o gcc-14.2.0_gnat.patch
Feb 19 07:24:11    o gcc-14.2.0_libcpp.patch
Feb 19 07:24:11    o gcc-14.2.0_libgcc.patch
Feb 19 07:24:11    o gcc-14.2.0_musl_poisoned_calloc.patch
Feb 19 07:24:11    o gcc-14.2.0_rv32iafc.patch
Feb 19 07:24:11 Unpacked and patched ... ok
Feb 19 07:24:11 Building packages ...
Feb 19 07:25:03 Building GMP v6.3.0 for host ... ok
Feb 19 07:25:39 Building MPFR v4.2.1 for host ... ok
Feb 19 07:25:50 Building MPC v1.3.1 for host ... ok
Feb 19 07:28:11 Building BINUTILS v2.43.1 for target ... ok
make[3]: *** [Makefile:20: build_gcc] Error 1
make[2]: *** [Makefile:36: build-i386] Error 2
make[1]: *** [util/crossgcc/Makefile.mk:32: crossgcc-i386] Error 2
make: *** [modules/coreboot:172: /root/heads/build/x86/coreboot-24.12/.heads-toolchain] Error 2
Feb 19 07:36:19 Building GCC v14.2.0 for target ... failed. Check 'build-i386-elf-GCC/build.log'.
Feb 19 07:36:19 make[1]: Leaving directory '/root/heads/build/x86/coreboot-24.12'

With detailed logs showed at https://app.circleci.com/pipelines/github/tlaurion/heads/3145/workflows/2f85c9b6-827c-41ec-b9b9-1ea51d4f6432/jobs/62760/parallel-runs/0/steps/0-106?invite=true#step-106-462419_180

g++  -fno-PIE -c   -O2  -fomit-frame-pointer -m64    -DIN_GCC -DCROSS_DIRECTORY_STRUCTURE   -fno-exceptions -fno-rtti -fasynchronous-unwind-tables -W -Wall -Wno-narrowing -Wwrite-strings -Wcast-qual -Wmissing-format-attribute -Wconditionally-supported -Woverloaded-virtual -pedantic -Wno-long-long -Wno-variadic-macros -Wno-overlength-strings   -DHAVE_CONFIG_H -fno-PIE -I. -I. -I../../gcc-14.2.0/gcc -I../../gcc-14.2.0/gcc/. -I../../gcc-14.2.0/gcc/../include  -I../../gcc-14.2.0/gcc/../libcpp/include -I../../gcc-14.2.0/gcc/../libcody -I/root/heads/build/x86/coreboot-24.12/util/crossgcc/xgcc/include -I/root/heads/build/x86/coreboot-24.12/util/crossgcc/xgcc/include -I/root/heads/build/x86/coreboot-24.12/util/crossgcc/xgcc/include  -I../../gcc-14.2.0/gcc/../libdecnumber -I../../gcc-14.2.0/gcc/../libdecnumber/dpd -I../libdecnumber -I../../gcc-14.2.0/gcc/../libbacktrace   -o cfg.o -MT cfg.o -MMD -MP -MF ./.deps/cfg.TPo ../../gcc-14.2.0/gcc/cfg.cc
g++  -fno-PIE -c   -O2  -fomit-frame-pointer -m64    -DIN_GCC -DCROSS_DIRECTORY_STRUCTURE   -fno-exceptions -fno-rtti -fasynchronous-unwind-tables -W -Wall -Wno-narrowing -Wwrite-strings -Wcast-qual -Wmissing-format-attribute -Wconditionally-supported -Woverloaded-virtual -pedantic -Wno-long-long -Wno-variadic-macros -Wno-overlength-strings   -DHAVE_CONFIG_H -fno-PIE -I. -I. -I../../gcc-14.2.0/gcc -I../../gcc-14.2.0/gcc/. -I../../gcc-14.2.0/gcc/../include  -I../../gcc-14.2.0/gcc/../libcpp/include -I../../gcc-14.2.0/gcc/../libcody -I/root/heads/build/x86/coreboot-24.12/util/crossgcc/xgcc/include -I/root/heads/build/x86/coreboot-24.12/util/crossgcc/xgcc/include -I/root/heads/build/x86/coreboot-24.12/util/crossgcc/xgcc/include  -I../../gcc-14.2.0/gcc/../libdecnumber -I../../gcc-14.2.0/gcc/../libdecnumber/dpd -I../libdecnumber -I../../gcc-14.2.0/gcc/../libbacktrace   -o cfganal.o -MT cfganal.o -MMD -MP -MF ./.deps/cfganal.TPo ../../gcc-14.2.0/gcc/cfganal.cc
make[1]: *** [Makefile:2634: s-attrtab] Illegal instruction
make[1]: *** Waiting for unfinished jobs....
during RTL pass: cprop
generic-match-4.cc: In function 'tree_node* generic_simplify_COND_EXPR(location_t, tree_code, tree, tree, tree, tree)':
generic-match-4.cc:16413:1: internal compiler error: Segmentation fault

Hmmm, not a race condition, but a problem linked to how CircleCI shares resources, and here, most probably OM Killer, killing a process taking too much memory per ./docker_repro.sh which estimates total memory consomptions with some heuristics that are not enough conservative?

Let's remember that by bumping to 24.12, we bumped crossgcc buildstack, which now depends on a newer gcc version, which in term might be more memory hungry and might require adaptation on estimation of resource consumptions made by Heads.

See https://app.circleci.com/pipelines/github/tlaurion/heads/3145/workflows/2f85c9b6-827c-41ec-b9b9-1ea51d4f6432/jobs/62760?invite=true#step-102-0_69

Feb 19 07:23:28 ----------------------------------------------------------------------
Feb 19 07:23:28 !!!!!! BUILD SYSTEM INFO !!!!!!
Feb 19 07:23:28 System CPUS: 36
Feb 19 07:23:28 System Available Memory: 8191 GB
Feb 19 07:23:28 System Load Average: 11.63
Feb 19 07:23:28 ----------------------------------------------------------------------
Feb 19 07:23:28 Used **CPUS**: 36
Feb 19 07:23:28 Used **LOADAVG**: 54
Feb 19 07:23:28 Used **AVAILABLE_MEM_GB**: 8191 GB
Feb 19 07:23:28 ----------------------------------------------------------------------
Feb 19 07:23:28 **MAKE_JOBS**: -j36 --load-average=54 
Feb 19 07:23:28 
Feb 19 07:23:28 Variables available for override (use 'make VAR_NAME=value'):
Feb 19 07:23:28 **CPUS** (default: number of processors, e.g., 'make CPUS=4')
Feb 19 07:23:28 **LOADAVG** (default: 1.5 times CPUS, e.g., 'make LOADAVG=54')
Feb 19 07:23:28 **AVAILABLE_MEM_GB** (default: memory available on the system in GB, e.g., 'make AVAILABLE_MEM_GB=4')
Feb 19 07:23:28 **MEM_PER_JOB_GB** (default: 1GB per job, e.g., 'make MEM_PER_JOB_GB=2')
Feb 19 07:23:28 ----------------------------------------------------------------------
Feb 19 07:23:28 !!!!!! Build starts !!!!!!

So Heads buildsystem passes -j36 --load-average=54, but AVAILABLE_MEM_GB**: 8191 GB. So if we used more then this, we triggered an OM killer.... Not sure what is best approach here. Reducing number of processes will impact build time. Some testing would be needed under .circleci/config.yml until this problem vanishes. This is a rabbit hole.

…teed minimal resource allocation of CircleCI being 8Gb. Will slow down builds.... Reasoning: - t480 depends on coreboot 24.12, which in turn depends on gcc 14.2 and consumes more memory through parallelization of CircleCI builds which randomly fails if CircleCI with 24.12 Failsafe which might break builds since less threads will be used to build, will see. TODO: reevaluate if builds take too long and timeouts on max 1h build time per step. Signed-off-by: Thierry Laurion <[email protected]>

…n case we change CircleCI worskpace caches leading to build artifacts being reusable in the future Signed-off-by: Thierry Laurion <[email protected]>

MattClifton76 · 2025-02-19T17:43:11Z

Wish me luck, it just completed the build, I'm going to try the update rom.

tlaurion · 2025-02-19T18:16:27Z

Annoying. So now CircleCI failed building kgpe-d16 with 384e243 because of a race condition (!?!?!?)

https://app.circleci.com/pipelines/github/tlaurion/heads/3151/workflows/0f9d06df-bc16-4b67-bd11-f9c4c0d6fa10/jobs/62904?invite=true#step-102-480781_60

Feb 19 18:11:03 gcc -D_DEFAULT_SOURCE  -D_XOPEN_SOURCE=700  -I/root/heads/build/x86/coreboot-4.11/util/cbfstool/flashmap -I/root/heads/build/x86/coreboot-4.11/util/cbfstool -IUNMAINTAINED_kgpe-d16_workstation-usb_keyboard/util/cbfstool -I/root/heads/build/x86/coreboot-4.11/src/commonlib/include -include /root/heads/build/x86/coreboot-4.11/src/commonlib/include/commonlib/compiler.h -I3rdparty/vboot/firmware/include -I3rdparty/vboot/firmware/2lib/include -I/root/heads/build/x86/coreboot-4.11/src -I/root/heads/build/x86/coreboot-4.11/src/vendorcode/intel/edk2/uefi_2.4/MdePkg/Include -Werror -Wall -Wextra -Wcast-qual -Wmissing-prototypes -Wredundant-decls -Wshadow -Wstrict-prototypes -Wwrite-strings -O2 -std=c99 -Wno-redundant-decls -g -fms-extensions -c -o UNMAINTAINED_kgpe-d16_workstation-usb_keyboard/util/cbfstool/fmd_parser.o UNMAINTAINED_kgpe-d16_workstation-usb_keyboard/util/cbfstool/fmd_parser.c
Feb 19 18:11:03 printf "    HOSTCC     cbfstool/fmd_scanner.o\n"
Feb 19 18:11:03     HOSTCC     cbfstool/fmd_scanner.o
Feb 19 18:11:03 gcc -D_DEFAULT_SOURCE  -D_XOPEN_SOURCE=700  -I/root/heads/build/x86/coreboot-4.11/util/cbfstool/flashmap -I/root/heads/build/x86/coreboot-4.11/util/cbfstool -IUNMAINTAINED_kgpe-d16_workstation-usb_keyboard/util/cbfstool -I/root/heads/build/x86/coreboot-4.11/src/commonlib/include -include /root/heads/build/x86/coreboot-4.11/src/commonlib/include/commonlib/compiler.h -I3rdparty/vboot/firmware/include -I3rdparty/vboot/firmware/2lib/include -I/root/heads/build/x86/coreboot-4.11/src -I/root/heads/build/x86/coreboot-4.11/src/vendorcode/intel/edk2/uefi_2.4/MdePkg/Include -Werror -Wall -Wextra -Wcast-qual -Wmissing-prototypes -Wredundant-decls -Wshadow -Wstrict-prototypes -Wwrite-strings -O2 -std=c99 -Wno-redundant-decls -Wno-unused-function -Wno-sign-compare -g -fms-extensions -c -o UNMAINTAINED_kgpe-d16_workstation-usb_keyboard/util/cbfstool/fmd_scanner.o UNMAINTAINED_kgpe-d16_workstation-usb_keyboard/util/cbfstool/fmd_scanner.c
Feb 19 18:11:03     ROMCC      generated/bootblock.inc
Feb 19 18:11:03 /root/heads/build/x86/coreboot-4.11/util/crossgcc/xgcc/bin/i386-elf-gcc -D__ROMCC__ -D__PRE_RAM__ -D__BOOTBLOCK__ -Isrc -Isrc/include -Isrc/commonlib/include -IUNMAINTAINED_kgpe-d16_workstation-usb_keyboard -I3rdparty/vboot/firmware/include -include src/include/kconfig.h -include src/include/rules.h -include src/commonlib/include/commonlib/compiler.h -I3rdparty -D__BUILD_DIR__=\"UNMAINTAINED_kgpe-d16_workstation-usb_keyboard\" -Isrc/superio/aspeed -Isrc/arch/x86/include -D__ARCH_x86_32__ -MM -MTUNMAINTAINED_kgpe-d16_workstation-usb_keyboard/generated/bootblock.inc \
Feb 19 18:11:03         src/arch/x86/bootblock_simple.c > UNMAINTAINED_kgpe-d16_workstation-usb_keyboard/generated/bootblock.inc.d
Feb 19 18:11:03 sh: line 1: UNMAINTAINED_kgpe-d16_workstation-usb_keyboard/generated/bootblock.inc.d: No such file or directory

And detailed, ordered logs under https://app.circleci.com/pipelines/github/tlaurion/heads/3151/workflows/0f9d06df-bc16-4b67-bd11-f9c4c0d6fa10/jobs/62904?invite=true#step-106-585497_138

/root/heads/crossgcc/x86/bin/../lib/gcc/x86_64-linux-musl/9.4.0/../../../../x86_64-linux-musl/bin/ld: /tmp/cchBNhWV.o: in function `main':
conftest.c:(.text.startup+0x4): undefined reference to `_getpty'
collect2: error: ld returned 1 exit status
configure:6729: $? = 1

I am currently unaware of users of the currently unmaintained d16 board, which alternative fork (fam15h based on coreboot 4.11, with AGESA support as a further goal, was PoC under #1910

I think I will remove it from CircleCI for now until someone takes the lead for kgpe-d16 under d16 club

EDIT: D16 club warned (matrix channel post)

… CircleCI to build for t480. Delegating needed fixes to linuxboot#1910 community effort and for the d16 club d16 board owners Signed-off-by: Thierry Laurion <[email protected]>

MattClifton76 · 2025-02-19T19:17:19Z

Wish me luck, it just completed the build, I'm going to try the update rom.

The Flash was successful, regenerated keys, resigned everything, booted into fedora 41, tested the FN keys. Everything seems to work, I will double check later on.

gaspar-ilom

Can you actually see this comment? It is weird that you do not see all my comments on the file changes....

tlaurion · 2025-02-19T20:46:36Z

config/coreboot-t480.config

+# CONFIG_USE_INTEL_FSP_MP_INIT is not set
+CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
+CONFIG_HAVE_HYPERTHREADING=y
+CONFIG_FSP_HYPERTHREADING=y


Doest change much under Heads where everything is mostly single process driven (with exception of scdaemin and gpg toolstack) and where GUI drives the calls to binaries outside of recovery shell, where the user can use Heads payload for recovery purposes.

gaspar-ilom · 2025-02-12T20:27:30Z

config/coreboot-t480.config

+CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
+CONFIG_LENOVO_TBFW_BIN=""


I believe we do not need to pull the thunderbolt stuff from libreboot as of now.

patches/coreboot-2412/0004-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch

patches/coreboot-2412/0009-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch

blobs/xx80/README

gaspar-ilom · 2025-02-16T21:05:17Z

config/coreboot-t480-maximized.config

+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y


I do not think we need to set this. The FSP blobs do not seem to depend on this setting.

No, but microcode updates from firmware do.

gaspar-ilom · 2025-02-16T21:08:21Z

config/coreboot-t480-maximized.config

+# CONFIG_USE_INTEL_FSP_MP_INIT is not set
+CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
+CONFIG_HAVE_HYPERTHREADING=y
+CONFIG_FSP_HYPERTHREADING=y


In my opinion we could set this to false to although there is a performance increase on some operating systems for certain tasks. Hyperthreading is an attack vector for side-channels like spectre meltdown.

gaspar-ilom · 2025-02-16T21:23:24Z

config/coreboot-t480-maximized.config

+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set


This should probably get reset if we drop https://github.com/tlaurion/heads/blob/poc_t480/patches/coreboot-24.12/85278-post-skylake-pr0.patch

We want this. Ti's tested working in PR comments.

modules/coreboot

+# Therefore, patches/coreboot-2412 includes libreboot patches applied to 24.12 release
+#  patches/coreboot-2412 also includes PR0 patchset, minus xeon support which don't apply to 24.12 as per https://review.coreboot.org/c/coreboot/+/85278
+#   TODO: @miczyg1 rebase of patchset so that doenstream don't have to maintain, adapt work
+coreboot-24.12_repo := https://review.coreboot.org/coreboot.git


gaspar-ilom · 2025-02-18T20:09:07Z

modules/coreboot

+# Therefore, patches/coreboot-2412 includes libreboot patches applied to 24.12 release
+#  patches/coreboot-2412 also includes PR0 patchset, minus xeon support which don't apply to 24.12 as per https://review.coreboot.org/c/coreboot/+/85278
+#   TODO: @miczyg1 rebase of patchset so that doenstream don't have to maintain, adapt work
+coreboot-24.12_repo := https://review.coreboot.org/coreboot.git


It is the same commit as what is used in the open coreboot review https://review.coreboot.org/c/coreboot/+/83274

I believe this was rebased at some point on that commit and previously branched off from an older commit. Have you tracked down where the ADA compiler issue was introduced? Maybe we can get away with using an older coreboot version for now? Or a newer one if it is fixed by coreboot...

gaspar-ilom · 2025-02-19T20:48:41Z

Can you actually see this comment? It is weird that you do not see all my comments on the file changes....

Ok I guess the problem was that I never submitted the full review...

gaspar-ilom · 2025-02-19T21:08:04Z

There is a race condition, which sometimes happen and sometimes not. Will get to the root of it and report it upstream. As stated before, crossgcc on 24.12 has issues, as can also be seen under #1908 CircleCI building each boards at https://app.circleci.com/pipelines/github/tlaurion/heads/3141/workflows/77e7a775-2f3a-4aba-a585-71fb020f01f2, which makes 20 boards break because of ADA compiler issue under 24.12 (upstream issue)

TLDR: unless at least race condition in crossgcc build is fixed (with an additional patch landing under patches/coreboot-24.12/*) this PR won't be mergeable, causing master CircleCI builds to fail as experienced here randomly and is a blocker for this PR to be merged)

I am not sure how to help with the build issues. Sorry.

MattClifton76 · 2025-02-19T21:09:17Z

@gaspar-ilom once your reviews are submitted will there be a new file created?

tlaurion · 2025-02-19T21:16:19Z

There is a race condition, which sometimes happen and sometimes not. Will get to the root of it and report it upstream. As stated before, crossgcc on 24.12 has issues, as can also be seen under #1908 CircleCI building each boards at https://app.circleci.com/pipelines/github/tlaurion/heads/3141/workflows/77e7a775-2f3a-4aba-a585-71fb020f01f2, which makes 20 boards break because of ADA compiler issue under 24.12 (upstream issue)

TLDR: unless at least race condition in crossgcc build is fixed (with an additional patch landing under patches/coreboot-24.12/*) this PR won't be mergeable, causing master CircleCI builds to fail as experienced here randomly and is a blocker for this PR to be merged)

I am not sure how to help with the build issues. Sorry.

I fixed it for t480 in this PR latest pushed commit.

What I'm saying is that 20 boards switched to 24.12 cannot build, so we won't be able to have other boards switch to 24.12.

This means that if Ada issue is fixed for next rlcoreboot release, and t480 is merged then, then all boards failing and t480 will be able to use next coreboot release.

As of now, t480 is alone and will stay alone using 24.12 because of gnat/ADA not being properly tested upstream.

Gcc 14+ and Ada don't seem to play well as of 24.12 release for libgfxinit which all intel based GPU boards under Heads depend on. Not sure why t480 is able to be built here. Didn't dig in the issue.

gaspar-ilom · 2025-02-19T21:16:28Z

@gaspar-ilom once your reviews are submitted will there be a new file created?

Not sure what you are referring to? The automated circleci builds? The review is just about discussing code changes until someone goes ahead and makes the changes in a fork so that they can be merged or cherry-picked into this branch. Only when that happens new builds are triggered.

gaspar-ilom · 2025-02-19T21:18:19Z

There is a race condition, which sometimes happen and sometimes not. Will get to the root of it and report it upstream. As stated before, crossgcc on 24.12 has issues, as can also be seen under #1908 CircleCI building each boards at https://app.circleci.com/pipelines/github/tlaurion/heads/3141/workflows/77e7a775-2f3a-4aba-a585-71fb020f01f2, which makes 20 boards break because of ADA compiler issue under 24.12 (upstream issue)
TLDR: unless at least race condition in crossgcc build is fixed (with an additional patch landing under patches/coreboot-24.12/*) this PR won't be mergeable, causing master CircleCI builds to fail as experienced here randomly and is a blocker for this PR to be merged)

I am not sure how to help with the build issues. Sorry.

I fixed it for t480 in this PR latest pushed commit.

What I'm saying is that 20 boards switched to 24.12 cannot build, so we won't be able to have other boards switch to 24.12.

This means that if Ada issue is fixed for next rlcoreboot release, and t480 is merged then, then all boards failing and t480 will be able to use next coreboot release.

As of now, t480 is alone and will stay alone using 24.12 because of gnat/ADA not being properly tested upstream.

Gcc 14+ and Ada don't seem to play well as of 24.12 release.

Thanks for your efforts and the clarification. I wasn't sure how happy you were with the state and whether it would still block merging this PR. Now it is clear.

MattClifton76 · 2025-02-19T21:21:33Z

@gaspar-ilom once your reviews are submitted will there be a new file created?

Not sure what you are referring to? The automated circleci builds? The review is just about discussing code changes until someone goes ahead and makes the changes in a fork so that they can be merged or cherry-picked into this branch. Only when that happens new builds are triggered.

My bad, I got you now. I'm still trying to figure how GitHub works. Thank you.

notgivenby · 2025-02-19T21:52:35Z

@notgivenby This is to me, the only thing preventing this PR to switch to quiet mode as for all other boards as of now,

@tlaurion @gaspar-ilom just tested the last commit and build: the battery info now is gone completely...
’TRACE: /etc/functions(1224): print_battery_charge
awk: cmd. line:1: Unexpexted token
DEBUG: Battery /sys/class/power_supply_BAT0 charge: %
awk: cmd. line:1: Unexpexted token
DEBUG: Battery /sys/class/power_supply_BAT0 charge: %
awk: cmd. line:1: Unexpexted token’
I cannot identify what is wrong with the code...

tlaurion · 2025-02-20T00:15:38Z

@notgivenby This is to me, the only thing preventing this PR to switch to quiet mode as for all other boards as of now,

@tlaurion @gaspar-ilom just tested the last commit and build: the battery info now is gone completely...
’TRACE: /etc/functions(1224): print_battery_charge
awk: cmd. line:1: Unexpexted token
DEBUG: Battery /sys/class/power_supply_BAT0 charge: %
awk: cmd. line:1: Unexpexted token
DEBUG: Battery /sys/class/power_supply_BAT0 charge: %
awk: cmd. line:1: Unexpexted token’
I cannot identify what is wrong with the code...

Please screenshot result of
find /sys/class/power_supply*

My guess is that the kernel config for t480 is missing something. Not having the hardware and being afk: I don't know what.

Then cat the content of those files,
Ie

find /sys/class/power_supply* | while read powerfile; do echo $powerfile; cat $powerfile; done

If too much output, put thumb drive with ext3/ext4/fat/exfat partition and

mount-usb --mode rw
find /sys/class/power_supply* | while read powerfile; do echo $powerfile; cat $powerfile; done > /media/powerfiles.txt
mount /media

And then provide output of said powerfiles.txt here.

akunterkontrolle and others added 18 commits February 11, 2025 11:25

Add additional coreboot version for T480

bce1881

Signed-off-by: Thierry Laurion <[email protected]>

Add coreboot patches for T480

ca1bd20

Signed-off-by: Thierry Laurion <[email protected]>

Add coreboot config for T480

b101d31

Signed-off-by: Thierry Laurion <[email protected]>

Add board config for T480

effa9f6

Signed-off-by: Thierry Laurion <[email protected]>

add a new t480.mk dealing with blobs

3a4be96

Signed-off-by: Thierry Laurion <[email protected]>

add dependencies and a script to download and modify essential blobs …

0be89cb

…for t480 Signed-off-by: Thierry Laurion <[email protected]>

change gbe and ifd_16 files

277e4da

Signed-off-by: Thierry Laurion <[email protected]>

modules/coreboot: t480; do not reuse 24.02.01 coreboot buildtack, sin…

fd3745c

…ce its not sharing the same coreboot buildstack (something 25.X.X, need to check) Signed-off-by: Thierry Laurion <[email protected]>

blobs/t480/download-clean-deguard-me.sh: deguard local call needs pyt…

304f6b9

…hon when used under nix docker Signed-off-by: Thierry Laurion <[email protected]>

boards/t480-maximized/t480-maximized.config: use t480 target that cal…

5ce5705

…ls blobs scripts Signed-off-by: Thierry Laurion <[email protected]>

config/linux-t480.config: use config/linux-librem_common-6.1.8.config…

c44285c

… as base Signed-off-by: Thierry Laurion <[email protected]>

bin/fetch_coreboot_crossgcc_archive.sh: change acpica default PFG_BAS…

bdb09c6

…EURL to use one of libreboot web mirror Signed-off-by: Thierry Laurion <[email protected]>

modules/coreboot: t480; state its based on 24.12, do not reuse corebo…

6176f6c

…ot 24.02 buildstack) Signed-off-by: Thierry Laurion <[email protected]>

tlaurion marked this pull request as draft February 11, 2025 18:46

tlaurion added 4 commits February 11, 2025 13:59

patches/coreboot-t480/85278-post-skylake-pr0.patch: remove xeon bits …

32fc31b

…we are not interested into which are conflicting against coreboot upstream commit 2f1e4e5e8515dd350cc9d68b48d32a5b6b02ae6a Signed-off-by: Thierry Laurion <[email protected]>

config/coreboot-t480.config: add PR0, unify against nv41, save in old…

e62b84b

…config Signed-off-by: Thierry Laurion <[email protected]>

config/coreboot-t480.config: unset CONFIG_DISPLAY_FSP_VERSION_INFO ot…

002d107

…herwise build error Signed-off-by: Thierry Laurion <[email protected]>

tlaurion mentioned this pull request Feb 11, 2025

Heads support for T480/T480s #1885

Open

boards/t480-maximized/t480-maximized.config: enable pr0 (impacts only…

e8974da

… after kexec call to final OS. Otherwise, problem with coreboot config) Signed-off-by: Thierry Laurion <[email protected]>

add t480 board

f75ddb8

Signed-off-by: gaspar-ilom <[email protected]>

gaspar-ilom mentioned this pull request Feb 12, 2025

add t480 board #1907

Closed

config/coreboot-t480.config: set CONFIG_FSP_USE_REPO=y otherwise buil…

f9ba787

…d error Signed-off-by: Thierry Laurion <[email protected]>

gaspar-ilom mentioned this pull request Feb 18, 2025

add some warning to the t480 board config about the TPM GPIO reset attack tlaurion/heads#16

Merged

tlaurion force-pushed the poc_t480 branch from 25a9586 to 63d40a8 Compare February 19, 2025 16:38

tlaurion added 2 commits February 19, 2025 11:44

CircleCI: add coreboot 24.12 in save_cache/restore_cache statements i…

67a027d

…n case we change CircleCI worskpace caches leading to build artifacts being reusable in the future Signed-off-by: Thierry Laurion <[email protected]>

tlaurion force-pushed the poc_t480 branch from 63d40a8 to 67a027d Compare February 19, 2025 16:45

CircleCI: drop building d16 which causes build issues with changes to…

84c0b2d

… CircleCI to build for t480. Delegating needed fixes to linuxboot#1910 community effort and for the d16 club d16 board owners Signed-off-by: Thierry Laurion <[email protected]>

tlaurion mentioned this pull request Feb 19, 2025

PoC : D16 15h coreboot fork #1910

Open

gaspar-ilom suggested changes Feb 19, 2025

View reviewed changes

gaspar-ilom mentioned this pull request Feb 19, 2025

add more volunteers as board testers for the T480 tlaurion/heads#17

Open

WiP: t480 boots without known regressions #1906

Are you sure you want to change the base?

WiP: t480 boots without known regressions #1906

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