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lvgl / lv_micropython Public

forked from micropython/micropython

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Python code lint and formatting with ruff

Update lib submodules #1

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Update lib submodules

Update lib submodules #1

Summary
Jobs
- ruff
Run details
- Usage
- Workflow file

Usage Workflow file

Annotations

10 errors

Run ruff check --output-format=github .: ports/esp32/boards/M5CORE2/modules/axp192.py#L1

ports/esp32/boards/M5CORE2/modules/axp192.py:1:1: E902 Failed to create cache key

Run ruff check --output-format=github .: ports/esp32/boards/M5CORE2/modules/ft6x36.py#L1

ports/esp32/boards/M5CORE2/modules/ft6x36.py:1:1: E902 Failed to create cache key

Run ruff check --output-format=github .: ports/esp32/boards/M5CORE2/modules/power.py#L77

ports/esp32/boards/M5CORE2/modules/power.py:77:12: E721 Do not compare types, use `isinstance()`

Run ruff check --output-format=github .: ports/esp32/modules/display_driver_utils.py#L1

ports/esp32/modules/display_driver_utils.py:1:1: E902 Failed to create cache key

Run ruff check --output-format=github .: ports/esp32/modules/fs_driver.py#L1

ports/esp32/modules/fs_driver.py:1:1: E902 Failed to create cache key

Run ruff check --output-format=github .: ports/esp32/modules/ili9341.py#L1

ports/esp32/modules/ili9341.py:1:1: E902 Failed to create cache key

Run ruff check --output-format=github .: ports/esp32/modules/ili9XXX.py#L1

ports/esp32/modules/ili9XXX.py:1:1: E902 Failed to create cache key

Run ruff check --output-format=github .: ports/esp32/modules/lv_colors.py#L1

ports/esp32/modules/lv_colors.py:1:1: E902 Failed to create cache key

Run ruff check --output-format=github .: ports/esp32/modules/lv_spi.py#L1

ports/esp32/modules/lv_spi.py:1:1: E902 Failed to create cache key

Run ruff check --output-format=github .: ports/esp32/modules/lv_utils.py#L1

ports/esp32/modules/lv_utils.py:1:1: E902 Failed to create cache key

ruff

failed Feb 16, 2025 in 7s

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