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Digital-Signal-Processing-Unit
Digital-Signal-Processing-Unit PublicA DSP based on xilinix FPGA DSP (DSP48E1) with some extra combinational logic. The project was implemented using verilog. The design schematics including the implemented design was done through viv…
Verilog 1
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SPI_slave-with-a-single-port-RAM
SPI_slave-with-a-single-port-RAM PublicSPI communication protocol is one of the most famous protocols. In this project a spi slave was implemented using verilog accompanied with a single port RAM.
Verilog 1
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Single-cycle-Risk-v
Single-cycle-Risk-v PublicA single cycle risk-v processor ALU implemented using Verilog HDL
Verilog
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ALS_Unit
ALS_Unit PublicAn arithmetic logic shift unit that performs operations on its inputs including XORing, Multiplication and rotating implemented with verilog. The functionality was tested by a testbench simulated u…
Verilog
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Gray_Counter
Gray_Counter PublicA 2-bit gray counter implemented with verilog in addition with a testbench
Verilog
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S_S_D_C_C
S_S_D_C_C PublicA simple moore self driving car control system. The system is responsible for accelerating, decelerating or even braking up the car. It is also capable to provide a signal to lock or unlock the doo…
Verilog
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