Add inline assembler tests for i386, arm, arm64, riscv32 and riscv64

[demotomohiro]

This fixes one error in #24544 .
I tested this on Raspberry Pi Pico (arm) and Raspberry Pi 3(arm64).
It is not tested on i386, riscv32 and riscv64 CPU.

[ringabout]

Reviewed by GitHub copilot

To verify the correctness of the assembly code, we need to check each architecture-specific block for proper syntax and logic. Here's a breakdown of the provided code:

x86 (i386 and amd64)

asm """
  mov %1, %0\n\t
  add $1, %0
  : "=r" (`dst`)
  : "r" (`src`)"""

• mov %1, %0 moves the value of src into dst.
• add $1, %0 increments dst by 1.

ARM (arm and arm64)

asm """
  mov %0, %1\n\t
  add %0, %0, #1
  : "=r" (`dst`)
  : "r" (`src`)"""

• mov %0, %1 moves the value of src into dst.
• add %0, %0, #1 increments dst by 1.

RISC-V (riscv32 and riscv64)

asm """
  addi %0, %1, 0\n\t
  addi %0, %0, 1
  : "=r" (`dst`)
  : "r" (`src)"""

• addi %0, %1, 0 moves the value of src into dst.
• addi %0, %0, 1 increments dst by 1.

Summary

The provided assembly code seems correct for each architecture. The logic is consistent across different architectures:

• Move the value of src into dst.
• Increment dst by 1.

If you need further verification, running tests on actual hardware or using an emulator for each architecture would be ideal.

[github-actions]

Thanks for your hard work on this PR!
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