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Add reg name to error when msr read fails
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Signed-off-by: Nathaniel Mitchell <[email protected]>
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npmitche authored and dscott90 committed Feb 22, 2024
1 parent 5f1b1d9 commit 9bf2ab6
Showing 1 changed file with 5 additions and 2 deletions.
7 changes: 5 additions & 2 deletions chipsec/chipset.py
Original file line number Diff line number Diff line change
Expand Up @@ -30,7 +30,7 @@
from chipsec.helper.nonehelper import NoneHelper
from chipsec.hal import cpu, io, iobar, mmio, msgbus, msr, pci, physmem, ucode, igd, cpuid
from chipsec.hal.pci import PCI_HDR_RID_OFF
from chipsec.exceptions import UnknownChipsetError, DeviceNotFoundError, CSReadError
from chipsec.exceptions import HWAccessViolationError, UnknownChipsetError, DeviceNotFoundError, CSReadError
from chipsec.exceptions import RegisterTypeNotFoundError, OsHelperError
from chipsec.exceptions import CSFirstNotFoundError, CSBusNotFoundError

Expand Down Expand Up @@ -486,7 +486,10 @@ def read_mmio_register(self, bus: Optional[int], reg: Dict[str, Any]) -> int:
return reg_value

def read_msr_register(self, cpu_thread: int, reg: Dict[str, Any]) -> int:
(eax, edx) = self.msr.read_msr(cpu_thread, reg['msr'])
try:
(eax, edx) = self.msr.read_msr(cpu_thread, reg['msr'])
except HWAccessViolationError as err:
raise HWAccessViolationError(f'Error reading {reg["name"]}: {err}', err.errorcode)
return (edx << 32) | eax

def read_portio_register(self, reg: Dict[str, Any]) -> int:
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