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Set up Github CI testing matrix for compliance tests
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olofk committed Jul 25, 2022
1 parent 0cce381 commit efe8ba8
Showing 1 changed file with 23 additions and 7 deletions.
30 changes: 23 additions & 7 deletions .github/workflows/ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,19 @@ jobs:
name: RISC-V Compliance Test
runs-on: ubuntu-20.04

strategy:
fail-fast: false
matrix:
compressed: [0, 1]
csr: [0, 1]
mdu: [0, 1]
exclude:
# compressed requires csr for the cebreak test
- compressed: 1
csr : 0
include:
- mdu: 1
mduflag: "--flag=mdu"
steps:
- uses: actions/checkout@v2
with:
Expand All @@ -27,7 +40,7 @@ jobs:
run: fusesoc library add mdu https://github.com/zeeshanrafique23/mdu

- name: build servant
run: fusesoc run --target=verilator_tb --flag=mdu --build --build-root=servant_x servant --memsize=8388608 --compressed=1
run: fusesoc run --target=verilator_tb ${{ matrix.mduflag }} --build --build-root=servant_x servant --memsize=8388608 --align=1 --compressed=${{ matrix.compressed }} --with_csr=${{ matrix.csr }}

- name: download riscv-arch-test version 2.7.4
run: git clone https://github.com/riscv-non-isa/riscv-arch-test.git --branch 2.7.4
Expand All @@ -37,12 +50,14 @@ jobs:
cd $GITHUB_WORKSPACE/riscv-arch-test
make RISCV_PREFIX=riscv64-unknown-elf- TARGETDIR=$SERV/riscv-target RISCV_TARGET=serv RISCV_DEVICE=I TARGET_SIM=$GITHUB_WORKSPACE/servant_x/verilator_tb-verilator/Vservant_sim
- name: run RV32 C compliance tests
- if: ${{ matrix.compressed }}
name: run RV32 C compliance tests
run: |
cd $GITHUB_WORKSPACE/riscv-arch-test
make RISCV_PREFIX=riscv64-unknown-elf- TARGETDIR=$SERV/riscv-target RISCV_TARGET=serv RISCV_DEVICE=C TARGET_SIM=$GITHUB_WORKSPACE/servant_x/verilator_tb-verilator/Vservant_sim
- name: run RV32 M compliance tests
- if: ${{ matrix.mdu }}
name: run RV32 M compliance tests
run: |
cd $GITHUB_WORKSPACE/riscv-arch-test
make RISCV_PREFIX=riscv64-unknown-elf- TARGETDIR=$SERV/riscv-target RISCV_TARGET=serv RISCV_DEVICE=M TARGET_SIM=$GITHUB_WORKSPACE/servant_x/verilator_tb-verilator/Vservant_sim
Expand All @@ -52,7 +67,8 @@ jobs:
cd $GITHUB_WORKSPACE/riscv-arch-test
make RISCV_PREFIX=riscv64-unknown-elf- TARGETDIR=$SERV/riscv-target RISCV_TARGET=serv RISCV_DEVICE=Zifencei TARGET_SIM=$GITHUB_WORKSPACE/servant_x/verilator_tb-verilator/Vservant_sim
# - name: run RV32 privilege compliance tests
# run: |
# cd $GITHUB_WORKSPACE/riscv-arch-test
# make RISCV_PREFIX=riscv64-unknown-elf- TARGETDIR=$SERV/riscv-target RISCV_TARGET=serv RISCV_DEVICE=privilege TARGET_SIM=$GITHUB_WORKSPACE/servant_x/verilator_tb-verilator/Vservant_sim
- if: ${{ matrix.csr }}
name: run RV32 privilege compliance tests
run: |
cd $GITHUB_WORKSPACE/riscv-arch-test
make RISCV_PREFIX=riscv64-unknown-elf- TARGETDIR=$SERV/riscv-target RISCV_TARGET=serv RISCV_DEVICE=privilege TARGET_SIM=$GITHUB_WORKSPACE/servant_x/verilator_tb-verilator/Vservant_sim

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