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Cesar #29

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Cesar #29

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jhlmarques
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Descrição

Adiciona a máquina Cesar ao Hidra

Passos para testar

Observações

jhlmarques and others added 2 commits October 31, 2022 20:21
@jhlmarques
Partial memory load (#28)
86e2497
@jhlmarques @TakatJJ
Fetch-decode-execute refactor
2043129 
Refactored all fetch, decode and execute to machines available.

Co-authored-by: TakatJJ <[email protected]>
Co-authored-by: Galeano Folle Domingues <[email protected]>
jhlmarques and others added 4 commits November 1, 2022 01:38
@jhlmarques jhlmarques changed the base branch from dev to master November 2, 2022 21:08
jhlmarques and others added 14 commits November 2, 2022 18:20
jhlmarques and others added 30 commits May 2, 2023 21:17
@jhlmarques
Adds additional Cesar assembly instructions; Adds One Parameter Instr…
70ccd0b 
…uctions assembly for Cesar
@jhlmarques
Adds two parameter instruction assembly
41a3c6c
@jhlmarques
Adds JSR, RTS and SOB assembly
972e6e6
@jhlmarques
Adds JMP and Conditional Jumps assembly
37fc38b
@jhlmarques
Renamed extractInstructionParameters to extractInstructionRegisterPar…
d8c3e44 
…ameter
@jhlmarques
Adds extractInstructionMemoryParameter()
76e9701
@jhlmarques
Changed instruction string generation to use currently decoded instru…
c27b9c5 
…ction
@jhlmarques
Adds "EQU" directive
850b782
@jhlmarques
Adds HLT assembly
25d6252
@jhlmarques
Fixes EQU not highlighting
ab5a114
@jhlmarques
Fixes miscalculation of instruction arguments
949e8b3
@jhlmarques
Fixes EQU bug
aedef88
@jhlmarques
Fixes behaviour of indirect after incremented and pre decremented
73f8a29
@jhlmarques
Fixes assembler not reserving bytes for indexed register addressing mods
44ae678
@jhlmarques
Fixes stack writing one byte instead of two
be7e4fd
@jhlmarques
Fixes SOB execution
ae5ea86
@jhlmarques
Fixes JSR's number of parameters
0fa0d4e
@jhlmarques
Fixes JSR addressing mode decoding
8cabe90
@jhlmarques
Adds GetCurrentOperandAddress; Fixes most instruction output address …
7bc0a26 
…acessing errors
@jhlmarques
Adds a new assembler pass to allow labels to be referenced before the…
9ec3bbe 
…ir definition
@jhlmarques
Cesar instructions now properly access destination addresses instead …
c0ca8b8 
…of values
@jhlmarques
Fixes JSR not accounting for additional bytes on return address calcu…
303395d 
…lation
@jhlmarques
Fixes SUB behaviour
d58473d
@jhlmarques
Adds missing variable assignment on conditional branch building; Fixe…
783d33f 
…s how the address is calculated
@jhlmarques
Fixes CCC and SCC not accepting lower case arguments
442939b
@jhlmarques @PedroMiola
Fixes stack behaviour (reading and writing in the wrong order)
89b33c2 
Co-authored-by: Pedro Poli Miola <[email protected]>
@jhlmarques
Fixes whitespace not corresponding to Daedalus' definition; Removes g…
7863cd8 
…etDecodedNumberOfExtraBytes due to obsoleteness; Fixes JSR behaviour with reordering of function calls; Fixes Stack not writing second byte
@jhlmarques
Fixes unhandled init exception in cesar test
dfc43e9
@jhlmarques
Fixes SUB test and flag calculation behaviour
ce6b301
@jhlmarques
Merges cesar visor to cesar branch
3fe8cbb
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4 participants
@jhlmarques @PedroMiola @TakatJJ @jvhendrix