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fix mstore
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Leo Alt committed Oct 20, 2023
1 parent f88e9c1 commit d37c087
Showing 1 changed file with 3 additions and 3 deletions.
6 changes: 3 additions & 3 deletions riscv/src/compiler.rs
Original file line number Diff line number Diff line change
Expand Up @@ -503,9 +503,9 @@ fn preamble(coprocessors: &CoProcessors) -> String {
// ============== memory instructions ==============
instr mstore Z, X {
{ Z, STEP, X } is m_is_write { m_addr, m_step, m_value },
Y = X + wrap_bit * 2**32, X = X_b1 + X_b2 * 0x100 + X_b3 * 0x10000 + X_b4 * 0x1000000
instr mstore Y, Z {
{ X, STEP, Z } is m_is_write { m_addr, m_step, m_value }//,
//Y = X + wrap_bit * 2**32, X = X_b1 + X_b2 * 0x100 + X_b3 * 0x10000 + X_b4 * 0x1000000
}
instr mload -> X { { addr, STEP, X } is m_is_read { m_addr, m_step, m_value } }
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