draft implementation

src/qibolab/instruments/qblox/cluster.py

@@ -82,11 +82,7 @@ def __init__(self, name: str, address: str, settings: Cluster_Settings = Cluster
     @property
     def reference_clock_source(self) -> ReferenceClockSource:
         if self.is_connected:
-            _reference_clock_source = self.device.get("reference_source")
-            if _reference_clock_source == "internal":
-                self.settings.reference_clock_source = ReferenceClockSource.INTERNAL
-            elif _reference_clock_source == "external":
-                self.settings.reference_clock_source = ReferenceClockSource.EXTERNAL
+            self.settings.reference_clock_source = ReferenceClockSource[self.device.get("reference_source").upper()]
         return self.settings.reference_clock_source
 
     @reference_clock_source.setter

src/qibolab/instruments/qblox/cluster_qcm_bb.py

@@ -4,9 +4,8 @@
 
 from qibo.config import log
 
-from qibolab.instruments.abstract import Instrument
 from qibolab.instruments.qblox.cluster import Cluster
-from qibolab.instruments.qblox.port import QbloxOutputPort
+from qibolab.instruments.qblox.module import ClusterModule
 from qibolab.instruments.qblox.q1asm import (
     Block,
     Register,
@@ -20,7 +19,7 @@
 from qibolab.sweeper import Parameter, Sweeper, SweeperType
 
 
-class ClusterQCM_BB(Instrument):
+class ClusterQCM_BB(ClusterModule):
     """Qblox Cluster Qubit Control Module Baseband driver.
 
     Qubit Control Module (QCM) is an arbitratry wave generator with two DACs connected to
@@ -124,8 +123,7 @@ def __init__(self, name: str, address: str, cluster: Cluster = None):
         >>> qcm_module = ClusterQCM_BB(name="qcm_bb", address="192.168.1.100:2", cluster=cluster_instance)
         """
         super().__init__(name, address)
-        self.ports: dict = {}
-        self.settings: dict = {}
+        # self.settings: dict = {}
         self.device = None
 
         self._debug_folder: str = ""
@@ -226,7 +224,7 @@ def connect(self):
                 self._set_device_parameter(target, "connect_out2", value="off")
                 self._set_device_parameter(target, "connect_out3", value="off")
             try:
-                for port in self.settings:
+                for port in self.ports:
                     self._sequencers[port] = []
                     self.ports[port].hardware_mod_en = True
                     self.ports[port].nco_freq = 0
@@ -263,7 +261,7 @@ def _erase_device_parameters_cache(self):
         """Erases the cache of instrument parameters."""
         self._device_parameters = {}
 
-    def setup(self, **settings):
+    def setup(self):
         """Cache the settings of the runcard and instantiate the ports of the module.
 
         Args:
@@ -274,12 +272,7 @@ def setup(self, **settings):
                   using the numerically controlled oscillator within the fpga. It only requires the upload of the pulse envelope waveform.
                   At the moment this param is not loaded but is always set to True.
         """
-        for port_num, port in enumerate(settings):
-            self.ports[port] = QbloxOutputPort(
-                self, self.DEFAULT_SEQUENCERS[port], port_number=port_num, port_name=port
-            )
-
-        self.settings = settings if settings else self.settings
+        pass
 
     def _get_next_sequencer(self, port, frequency, qubits: dict):
         """Retrieves and configures the next avaliable sequencer.

src/qibolab/instruments/qblox/cluster_qcm_rf.py

@@ -5,9 +5,8 @@
 from qblox_instruments.qcodes_drivers.qcm_qrm import QcmQrm as QbloxQrmQcm
 from qibo.config import log
 
-from qibolab.instruments.abstract import Instrument
 from qibolab.instruments.qblox.cluster import Cluster
-from qibolab.instruments.qblox.port import QbloxOutputPort
+from qibolab.instruments.qblox.module import ClusterModule
 from qibolab.instruments.qblox.q1asm import (
     Block,
     Register,
@@ -21,7 +20,7 @@
 from qibolab.sweeper import Parameter, Sweeper, SweeperType
 
 
-class ClusterQCM_RF(Instrument):
+class ClusterQCM_RF(ClusterModule):
     """Qblox Cluster Qubit Control Module RF driver.
 
     Qubit Control Module RF (QCM-RF) is an instrument that integrates an arbitratry
@@ -151,7 +150,6 @@ def __init__(self, name: str, address: str, cluster: Cluster):
         """
         super().__init__(name, address)
         self.device: QbloxQrmQcm = None
-        self.ports: dict = {}
         self.settings = {}
         self._debug_folder: str = ""
         self._cluster: Cluster = cluster
@@ -302,11 +300,11 @@ def setup(self, **settings):
                   using the numerically controlled oscillator within the fpga. It only requires the upload of the pulse envelope waveform.
                   At the moment this param is not loaded but is always set to True.
         """
-        for port_num, port in enumerate(settings):
-            self.ports[port] = QbloxOutputPort(
-                self, self.DEFAULT_SEQUENCERS[port], port_number=port_num, port_name=port
-            )
-            self._sequencers[port] = []
+        # for port_num, port in enumerate(settings):
+        #     self.ports[port] = QbloxOutputPort(
+        #         self, self.DEFAULT_SEQUENCERS[port], port_number=port_num, port_name=port
+        #     )
+        # self._sequencers[port] = []
         self.settings = settings if settings else self.settings
 
     def _get_next_sequencer(self, port, frequency, qubit: None):

src/qibolab/instruments/qblox/cluster_qrm_rf.py

@@ -6,9 +6,8 @@
 from qblox_instruments.qcodes_drivers.qcm_qrm import QcmQrm as QbloxQrmQcm
 from qibo.config import log
 
-from qibolab.instruments.abstract import Instrument
 from qibolab.instruments.qblox.cluster import Cluster
-from qibolab.instruments.qblox.port import QbloxInputPort, QbloxOutputPort
+from qibolab.instruments.qblox.module import ClusterModule
 from qibolab.instruments.qblox.q1asm import (
     Block,
     Register,
@@ -22,7 +21,7 @@
 from qibolab.sweeper import Parameter, Sweeper, SweeperType
 
 
-class ClusterQRM_RF(Instrument):
+class ClusterQRM_RF(ClusterModule):
     """Qblox Cluster Qubit Readout Module RF driver.
 
     Qubit Readout Module RF (QRM-RF) is an instrument that integrates an arbitrary wave generator, a digitizer,
@@ -162,7 +161,6 @@ def __init__(self, name: str, address: str, cluster: Cluster):
 
         super().__init__(name, address)
         self.device: QbloxQrmQcm = None
-        self.ports: dict = {}
         self.classification_parameters: dict = {}
 
         self.settings: dict = {}

src/qibolab/instruments/qblox/module.py

@@ -0,0 +1,38 @@
+""" Qblox Cluster QCM driver."""
+
+from qibolab.instruments.abstract import Instrument
+from qibolab.instruments.qblox.port import QbloxInputPort, QbloxOutputPort
+
+
+class ClusterModule(Instrument):
+    DEFAULT_SEQUENCERS = {}
+
+    def __init__(self, name: str, address: str):
+        """ """
+        super().__init__(name, address)
+        self.ports: dict = {}
+
+    def port(self, name: str, out: bool = True):
+        def count(cls):
+            return len(list(filter(lambda x: isinstance(x, cls), self.ports)))
+
+        if hasattr(self, "acquire"):
+            print(type(self))
+            if out:
+                self.ports[name] = QbloxOutputPort(
+                    self, self.DEFAULT_SEQUENCERS["o1"], port_number=count(QbloxOutputPort), port_name=name
+                )
+            else:
+                self.ports[name] = QbloxInputPort(
+                    self,
+                    output_sequencer_number=self.DEFAULT_SEQUENCERS["o1"],
+                    input_sequencer_number=self.DEFAULT_SEQUENCERS["i1"],
+                    port_number=count(QbloxOutputPort),
+                    port_name=name,
+                )
+        else:
+            print(type(self))
+            self.ports[name] = QbloxOutputPort(
+                self, self.DEFAULT_SEQUENCERS[name], port_number=len(self.ports), port_name=name
+            )
+        return self.ports[name]

tests/dummy_qrc/qblox.py

@@ -72,23 +72,23 @@ def create(runcard_path=RUNCARD):
     # Create channel objects
     channels = ChannelMap()
     # Readout
-    channels |= Channel(name="L3-25_a", port=modules["qrm_rf_a"].ports["o1"])
-    channels |= Channel(name="L3-25_b", port=modules["qrm_rf_b"].ports["o1"])
+    channels |= Channel(name="L3-25_a", port=modules["qrm_rf_a"].port("o1"))
+    channels |= Channel(name="L3-25_b", port=modules["qrm_rf_b"].port("o1"))
     # Feedback
-    channels |= Channel(name="L2-5_a", port=modules["qrm_rf_a"].ports["i1"])
-    channels |= Channel(name="L2-5_b", port=modules["qrm_rf_b"].ports["i1"])
+    channels |= Channel(name="L2-5_a", port=modules["qrm_rf_a"].port("i1"))
+    channels |= Channel(name="L2-5_b", port=modules["qrm_rf_b"].port("i1"))
     # Drive
-    channels |= Channel(name="L3-15", port=modules["qcm_rf0"].ports["o1"])
-    channels |= Channel(name="L3-11", port=modules["qcm_rf0"].ports["o2"])
-    channels |= Channel(name="L3-12", port=modules["qcm_rf1"].ports["o1"])
-    channels |= Channel(name="L3-13", port=modules["qcm_rf1"].ports["o2"])
-    channels |= Channel(name="L3-14", port=modules["qcm_rf2"].ports["o1"])
+    channels |= Channel(name="L3-15", port=modules["qcm_rf0"].port("o1"))
+    channels |= Channel(name="L3-11", port=modules["qcm_rf0"].port("o2"))
+    channels |= Channel(name="L3-12", port=modules["qcm_rf1"].port("o1"))
+    channels |= Channel(name="L3-13", port=modules["qcm_rf1"].port("o2"))
+    channels |= Channel(name="L3-14", port=modules["qcm_rf2"].port("o1"))
     # Flux
-    channels |= Channel(name="L4-5", port=modules["qcm_bb0"].ports["o1"])
-    channels |= Channel(name="L4-1", port=modules["qcm_bb0"].ports["o2"])
-    channels |= Channel(name="L4-2", port=modules["qcm_bb0"].ports["o3"])
-    channels |= Channel(name="L4-3", port=modules["qcm_bb0"].ports["o4"])
-    channels |= Channel(name="L4-4", port=modules["qcm_bb1"].ports["o1"])
+    channels |= Channel(name="L4-5", port=modules["qcm_bb0"].port("o1"))
+    channels |= Channel(name="L4-1", port=modules["qcm_bb0"].port("o2"))
+    channels |= Channel(name="L4-2", port=modules["qcm_bb0"].port("o3"))
+    channels |= Channel(name="L4-3", port=modules["qcm_bb0"].port("o4"))
+    channels |= Channel(name="L4-4", port=modules["qcm_bb1"].port("o1"))
     # TWPA
     channels |= Channel(name="L3-28", port=None)
     channels["L3-28"].local_oscillator = twpa_pump

tests/dummy_qrc/qblox.yml

@@ -14,15 +14,6 @@ instruments:
       frequency: 6_535_900_000
       power: 4
 
-    qcm_bb0:
-        o1: True
-        o2: True
-        o3: True
-        o4: True
-
-    qcm_bb1:
-        o1: True
-
     qcm_rf0:
         o1:
             attenuation: 20

tests/test_instruments_qblox_cluster_qcm_bb.py

@@ -38,9 +38,7 @@ def qcm_bb(controller, cluster):
 
 @pytest.fixture(scope="module")
 def connected_qcm_bb(connected_controller, connected_cluster):
-    settings = {"o1": True, "o2": True, "o3": True, "o4": True}
     qcm_bb = get_qcm_bb(connected_controller, connected_cluster)
-    qcm_bb.setup(**settings)
     qcm_bb.connect()
     yield qcm_bb
     qcm_bb.disconnect()
@@ -61,12 +59,12 @@ def test_init(qcm_bb: ClusterQCM_BB):
     assert type(qcm_bb._cluster) == Cluster
 
 
-def test_setup(qcm_bb: ClusterQCM_BB):
-    settings = {"o1": True, "o2": True, "o3": True, "o4": True}
-    qcm_bb.setup(**settings)
-    for idx, port in enumerate(settings):
-        assert type(qcm_bb.ports[port]) == QbloxOutputPort
-        assert qcm_bb.ports[port].sequencer_number == idx
+# def test_setup(qcm_bb: ClusterQCM_BB):
+#     settings = {"o1": True, "o2": True, "o3": True, "o4": True}
+#     qcm_bb.setup(**settings)
+#     for idx, port in enumerate(settings):
+#         assert type(qcm_bb.ports[port]) == QbloxOutputPort
+#         assert qcm_bb.ports[port].sequencer_number == idx
 
 
 @pytest.mark.qpu
@@ -75,6 +73,9 @@ def test_connect(connected_qcm_bb: ClusterQCM_BB):
 
     assert qcm_bb.is_connected
     assert not qcm_bb is None
+    for idx, port in enumerate(qcm_bb.ports):
+        assert type(qcm_bb.ports[port]) == QbloxOutputPort
+        assert qcm_bb.ports[port].sequencer_number == idx
 
     o1_default_sequencer = qcm_bb.device.sequencers[qcm_bb.DEFAULT_SEQUENCERS["o1"]]
     o2_default_sequencer = qcm_bb.device.sequencers[qcm_bb.DEFAULT_SEQUENCERS["o2"]]

tests/test_instruments_qblox_cluster_qcm_rf.py

@@ -86,14 +86,7 @@ def test_setup(qcm_rf: ClusterQCM_RF):
         },
     }
     qcm_rf.setup(**settings)
-    for port in settings:
-        assert type(qcm_rf.ports[port]) == QbloxOutputPort
-        assert type(qcm_rf._sequencers[port]) == list
     assert qcm_rf.settings == settings
-    o1_output_port: QbloxOutputPort = qcm_rf.ports["o1"]
-    o2_output_port: QbloxOutputPort = qcm_rf.ports["o2"]
-    assert o1_output_port.sequencer_number == 0
-    assert o2_output_port.sequencer_number == 1
 
 
 @pytest.mark.qpu
@@ -163,6 +156,14 @@ def test_connect(connected_cluster: Cluster, connected_qcm_rf: ClusterQCM_RF):
     assert qcm_rf.ports["o2"].nco_freq == 0
     assert qcm_rf.ports["o2"].nco_phase_offs == 0
 
+    for port in qcm_rf.settings:
+        assert type(qcm_rf.ports[port]) == QbloxOutputPort
+        assert type(qcm_rf._sequencers[port]) == list
+    o1_output_port: QbloxOutputPort = qcm_rf.ports["o1"]
+    o2_output_port: QbloxOutputPort = qcm_rf.ports["o2"]
+    assert o1_output_port.sequencer_number == 0
+    assert o2_output_port.sequencer_number == 1
+
 
 @pytest.mark.qpu
 def test_pulse_sequence(connected_platform, connected_qcm_rf: ClusterQCM_RF):