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transport: Specify the doorbell register width for P2A doorbell
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Signed-off-by: Rahul Pathak <[email protected]>
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pathakraul committed Dec 30, 2024
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Expand Up @@ -77,6 +77,9 @@ If the P2A doorbell is a MSI then the application processors must configure
the MSI on the platform microcontroller side using the RPMI service defined by
the `BASE` service group.

The doorbell register must support write operation or a read-modify-write sequence
on a 32-bit memory-mapped register.

NOTE: If the platform supports PLIC, the platform need to provide a MMIO
register to inject an edge-triggered interrupt.

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