combine two notes into 1

src/cheri-pte-ext.adoc

@@ -137,10 +137,7 @@ regards to the ongoing capability revocation cycle. Two schemes are permitted:
 and the virtual page's CRG bit does not equal <<sstatusreg_pte,sstatus>>.CRG.
 * A load page fault exception is raised when a capability load or AMO instruction is executed
 and the virtual page's CRG bit does not equal <<sstatusreg_pte,sstatus>>.CRG
-and the capability read from memory has its tag set.
-
-NOTE: An implementation may avoid a dependency on the tag
-bit value of the capability read. This will introduce additional traps during revocation sweeps.
+and the capability read from memory has its tag set^1^.
 
 [[pte_cw_crg_load_summary]]
 .Summary of Load CW and CRG behavior in the PTEs
@@ -165,6 +162,7 @@ bit value of the capability read. This will introduce additional traps during re
 ^1^ The choice here is whether to take data dependent exceptions on loads or atomic operations.
  It is legal for the implementation to fault even if the tag is not set since this behaviour is only an optimization for software.
  This means it is also legal to only check the tag under certain conditions and conservatively fault otherwise.
+ Taking a trap when the tag is not set will introduce additional traps during revocation sweeps.
 
 ^2^ See <<section_hardware_pte_updates>>.