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clarify PCC fault vs instruction access fault #495

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merged 1 commit into from
Dec 20, 2024

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@tariqkurd-repo tariqkurd-repo commented Dec 19, 2024

fixes #494
@tomaird

the diff is a bit confused as a renumbered the notes below the table
the only real addition is the new note number 1

@tariqkurd-repo tariqkurd-repo merged commit c189447 into riscv:main Dec 20, 2024
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^1^ The higher priority CHERI <<cheri_pte_ext,PTE>> page fault covers capability loads or atomics where the loaded tag _is not_ checked, and all capability stores and atomics where the stored tag is set.
^1^ PCC bounds are intended to be checked against all the bytes of fetched instructions.
In the case of variable length instruction encoding, and that the fetch has failed to return any data, then only a minimum length instruction is checked against the PCC bounds.
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This sounds a lot like “fetch the whole instruction and only then check bounds” which can be dangerous wrt side channels

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PCC bounds checking depends on fetched instruction
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