Code fixes forgotten after rebase.

rizinorg · Mar 22, 2024 · 6531819 · 6531819
1 parent c97887c
commit 6531819
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Showing 3 changed files with 12 additions and 262 deletions.
diff --git a/handwritten/hexagon_arch_c/functions.c b/handwritten/hexagon_arch_c/functions.c
@@ -620,7 +620,7 @@ static void make_packet_valid(RZ_BORROW HexState *state, RZ_BORROW HexPkt *pkt)
  * \param pkt The packet which predecessor will be updated.
  */
 static void make_next_packet_valid(HexState *state, const HexPkt *pkt) {
-	HexInsnContainer *tmp = rz_list_get_top(pkt->bin);
+	HexInsnContainer *tmp = rz_list_get_n(pkt->bin, 0);
 	if (!tmp) {
 		return;
 	}
@@ -1027,13 +1027,17 @@ static void copy_asm_ana_ops(const HexState *state, RZ_BORROW HexReversedOpcode
 		memcpy(rz_reverse->ana_op, &hic->ana_op, sizeof(RzAnalysisOp));
 		rz_strbuf_set(&rz_reverse->asm_op->buf_asm, hic->text);
 		rz_reverse->asm_op->asm_toks = rz_asm_tokenize_asm_regex(&rz_reverse->asm_op->buf_asm, state->token_patterns);
-		rz_reverse->asm_op->asm_toks->op_type = hic->ana_op.type;
+		if (rz_reverse->asm_op->asm_toks) {
+		    rz_reverse->asm_op->asm_toks->op_type = hic->ana_op.type;
+		}
 		break;
 	case HEXAGON_DISAS:
 		memcpy(rz_reverse->asm_op, &hic->asm_op, sizeof(RzAsmOp));
 		rz_strbuf_set(&rz_reverse->asm_op->buf_asm, hic->text);
 		rz_reverse->asm_op->asm_toks = rz_asm_tokenize_asm_regex(&rz_reverse->asm_op->buf_asm, state->token_patterns);
-		rz_reverse->asm_op->asm_toks->op_type = hic->ana_op.type;
+		if (rz_reverse->asm_op->asm_toks) {
+		    rz_reverse->asm_op->asm_toks->op_type = hic->ana_op.type;
+		}
 		break;
 	case HEXAGON_ANALYSIS:
 		memcpy(rz_reverse->ana_op, &hic->ana_op, sizeof(RzAnalysisOp));

diff --git a/handwritten/hexagon_il_c/functions.c b/handwritten/hexagon_il_c/functions.c
@@ -57,7 +57,7 @@ static void hex_send_insn_to_i(RzPVector /*<HexILOp *>*/ *ops, ut8 start, ut8 ne
 		direction = -1;
 	}
 	for (i = start; i != newloc; i += direction) {
-		HexILOp *tmp_op = *rz_pvector_assign_at(ops, i, (HexILOp *)*rz_pvector_index_ptr(ops, i + direction));
+		HexILOp *tmp_op = *rz_pvector_assign_at(ops, i, (HexILOp *)rz_pvector_at(ops, i + direction));
 		rz_pvector_assign_at(ops, i + direction, tmp_op);
 	}
 }
@@ -109,7 +109,7 @@ RZ_IPI bool hex_shuffle_insns(RZ_INOUT HexPkt *p) {
 		n_mems = 0;
 		flag = false;
 		for (flag = false, n_mems = 0, i = last_insn; i >= 0; i--) {
-			op = (HexILOp *)*rz_pvector_index_ptr(ops, i);
+			op = (HexILOp *)rz_pvector_at(ops, i);
 			if (!op) {
 				RZ_LOG_FATAL("NULL il op at index %" PFMT32d "\n", i);
 			}
@@ -140,7 +140,7 @@ RZ_IPI bool hex_shuffle_insns(RZ_INOUT HexPkt *p) {
 
 		/* Comparisons go first, may be reordered with regard to each other */
 		for (flag = false, i = 0; i < last_insn + 1; i++) {
-			op = (HexILOp *)*rz_pvector_index_ptr(ops, i);
+			op = (HexILOp *)rz_pvector_at(ops, i);
 			if ((op->attr & HEX_IL_INSN_ATTR_WPRED) &&
 				(op->attr & HEX_IL_INSN_ATTR_MEM_WRITE)) {
 				/* This should be a comparison (not a store conditional) */
@@ -177,7 +177,7 @@ RZ_IPI bool hex_shuffle_insns(RZ_INOUT HexPkt *p) {
 	 * very end, past stores
 	 */
 	for (i = 0; i < last_insn; i++) {
-		op = (HexILOp *)*rz_pvector_index_ptr(ops, i);
+		op = (HexILOp *)rz_pvector_at(ops, i);
 		if (op->attr & HEX_IL_INSN_ATTR_NEW) {
 			hex_send_insn_to_i(ops, i, last_insn);
 			break;
@@ -212,7 +212,7 @@ static RZ_OWN RzILOpEffect *hex_pkt_to_il_seq(HexPkt *pkt) {
 	}
 	RzILOpEffect *complete_seq = EMPTY();
 	for (ut32 i = 0; i < rz_pvector_len(pkt->il_ops); ++i) {
-		complete_seq = SEQ2(complete_seq, hex_il_op_to_effect((HexILOp *)*rz_pvector_index_ptr(pkt->il_ops, i), pkt));
+		complete_seq = SEQ2(complete_seq, hex_il_op_to_effect((HexILOp *)rz_pvector_at(pkt->il_ops, i), pkt));
 	}
 	return complete_seq;
 }

diff --git a/rizin/librz/analysis/hexagon_dwarf_reg_num_table.inc b/rizin/librz/analysis/hexagon_dwarf_reg_num_table.inc