More review comments

robehn · May 22, 2024 · 0048ea1 · 0048ea1
1 parent e017302
commit 0048ea1
Show file tree

Hide file tree

Showing 3 changed files with 3 additions and 9 deletions.
diff --git a/src/hotspot/cpu/riscv/nativeInst_riscv.cpp b/src/hotspot/cpu/riscv/nativeInst_riscv.cpp
@@ -93,7 +93,7 @@ bool NativeInstruction::is_movptr1_at(address instr) {
          (is_addi_at(instr + instruction_size * 5) ||
           is_jalr_at(instr + instruction_size * 5) ||
           is_load_at(instr + instruction_size * 5)) && // Addi/Jalr/Load
-         check_movptr_data_dependency(instr);
+         check_movptr1_data_dependency(instr);
 }
 
 bool NativeInstruction::is_movptr2_at(address instr) {

diff --git a/src/hotspot/cpu/riscv/nativeInst_riscv.hpp b/src/hotspot/cpu/riscv/nativeInst_riscv.hpp
@@ -114,7 +114,7 @@ class NativeInstruction {
   //     addi
   //     slli
   //     addi/jalr/load
-  static bool check_movptr_data_dependency(address instr) {
+  static bool check_movptr1_data_dependency(address instr) {
     address lui = instr;
     address addi1 = lui + instruction_size;
     address slli1 = addi1 + instruction_size;
@@ -416,12 +416,6 @@ class NativeMovConstReg: public NativeInstruction {
   intptr_t data() const;
   void set_data(intptr_t x);
 
-  void flush() {
-    if (!maybe_cpool_ref(instruction_address())) {
-      ICache::invalidate_range(instruction_address(), movptr1_instruction_size /* > movptr2_instruction_size */);
-    }
-  }
-
   void verify();
   void print();
 

diff --git a/src/hotspot/cpu/riscv/riscv.ad b/src/hotspot/cpu/riscv/riscv.ad
@@ -1286,7 +1286,7 @@ int CallStaticJavaDirectNode::compute_padding(int current_offset) const
 int CallDynamicJavaDirectNode::compute_padding(int current_offset) const
 {
   // skip the movptr2 in MacroAssembler::ic_call():
-  // lui + addi + slli + addi + slli + addi
+  // lui, lui, slli, add, addi
   // Though movptr2() has already 4-byte aligned with or without RVC,
   // We need to prevent from further changes by explicitly calculating the size.
   current_offset += NativeMovConstReg::movptr2_instruction_size;