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@robehn
robehn committed Feb 22, 2024
1 parent e1be7f1 commit 095e475
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Showing 22 changed files with 277 additions and 277 deletions.
12 changes: 6 additions & 6 deletions src/hotspot/cpu/riscv/c1_CodeStubs_riscv.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -65,7 +65,7 @@ void CounterOverflowStub::emit_code(LIR_Assembler* ce) {
__ far_call(RuntimeAddress(Runtime1::entry_for(Runtime1::counter_overflow_id)));
ce->add_call_info_here(_info);
ce->verify_oop_map(_info);
__ jump(_continuation);
__ j(_continuation);
}

void RangeCheckStub::emit_code(LIR_Assembler* ce) {
Expand Down Expand Up @@ -147,7 +147,7 @@ void NewInstanceStub::emit_code(LIR_Assembler* ce) {
ce->add_call_info_here(_info);
ce->verify_oop_map(_info);
assert(_result->as_register() == x10, "result must in x10");
__ jump(_continuation);
__ j(_continuation);
}

// Implementation of NewTypeArrayStub
Expand All @@ -167,7 +167,7 @@ void NewTypeArrayStub::emit_code(LIR_Assembler* ce) {
ce->add_call_info_here(_info);
ce->verify_oop_map(_info);
assert(_result->as_register() == x10, "result must in x10");
__ jump(_continuation);
__ j(_continuation);
}

// Implementation of NewObjectArrayStub
Expand All @@ -187,7 +187,7 @@ void NewObjectArrayStub::emit_code(LIR_Assembler* ce) {
ce->add_call_info_here(_info);
ce->verify_oop_map(_info);
assert(_result->as_register() == x10, "result must in x10");
__ jump(_continuation);
__ j(_continuation);
}

void MonitorEnterStub::emit_code(LIR_Assembler* ce) {
Expand All @@ -204,7 +204,7 @@ void MonitorEnterStub::emit_code(LIR_Assembler* ce) {
__ far_call(RuntimeAddress(Runtime1::entry_for(enter_id)));
ce->add_call_info_here(_info);
ce->verify_oop_map(_info);
__ jump(_continuation);
__ j(_continuation);
}

void MonitorExitStub::emit_code(LIR_Assembler* ce) {
Expand Down Expand Up @@ -332,7 +332,7 @@ void ArrayCopyStub::emit_code(LIR_Assembler* ce) {
}
#endif

__ jump(_continuation);
__ j(_continuation);
}

#undef __
4 changes: 2 additions & 2 deletions src/hotspot/cpu/riscv/c1_LIRAssembler_arraycopy_riscv.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -72,7 +72,7 @@ void LIR_Assembler::generic_arraycopy(Register src, Register src_pos, Register l
__ subw(length, length, t0);
__ addw(src_pos, src_pos, t0);
__ addw(dst_pos, dst_pos, t0);
__ jump(*stub->entry());
__ j(*stub->entry());

__ bind(*stub->continuation());
}
Expand Down Expand Up @@ -235,7 +235,7 @@ void LIR_Assembler::arraycopy_type_check(Register src, Register src_pos, Registe
arraycopy_checkcast(src, src_pos, length, dst, dst_pos, tmp, stub, basic_type, copyfunc_addr, flags);
}

__ jump(*stub->entry());
__ j(*stub->entry());
__ bind(cont);
POP(src, dst);
}
Expand Down
26 changes: 13 additions & 13 deletions src/hotspot/cpu/riscv/c1_LIRAssembler_riscv.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -341,7 +341,7 @@ int LIR_Assembler::emit_unwind_handler() {
monitor_address(0, FrameMap::r10_opr);
stub = new MonitorExitStub(FrameMap::r10_opr, true, 0);
if (LockingMode == LM_MONITOR) {
__ jump(*stub->entry());
__ j(*stub->entry());
} else {
__ unlock_object(x15, x14, x10, x16, *stub->entry());
}
Expand Down Expand Up @@ -884,7 +884,7 @@ void LIR_Assembler::cmove(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, L
move_op(opr2, result, type, lir_patch_none, nullptr,
false, // pop_fpu_stack
false); // wide
__ jump(done);
__ j(done);
__ bind(label);
move_op(opr1, result, type, lir_patch_none, nullptr,
false, // pop_fpu_stack
Expand All @@ -909,7 +909,7 @@ void LIR_Assembler::emit_branch(LIR_Condition cmp_flag, LIR_Opr cmp1, LIR_Opr cm
bool is_far, bool is_unordered) {

if (cmp_flag == lir_cond_always) {
__ jump(label);
__ j(label);
return;
}

Expand Down Expand Up @@ -1002,7 +1002,7 @@ void LIR_Assembler::emit_alloc_array(LIR_OpAllocArray* op) {
if (UseSlowPath ||
(!UseFastNewObjectArray && is_reference_type(op->type())) ||
(!UseFastNewTypeArray && !is_reference_type(op->type()))) {
__ jump(*op->stub()->entry());
__ j(*op->stub()->entry());
} else {
Register tmp1 = op->tmp1()->as_register();
Register tmp2 = op->tmp2()->as_register();
Expand Down Expand Up @@ -1037,7 +1037,7 @@ void LIR_Assembler::type_profile_helper(Register mdo, ciMethodData *md, ciProfil
__ bne(recv, t1, next_test);
Address data_addr(mdo, md->byte_offset_of_slot(data, ReceiverTypeData::receiver_count_offset(i)));
__ increment(data_addr, DataLayout::counter_increment);
__ jump(*update_done);
__ j(*update_done);
__ bind(next_test);
}

Expand All @@ -1050,7 +1050,7 @@ void LIR_Assembler::type_profile_helper(Register mdo, ciMethodData *md, ciProfil
__ sd(recv, recv_addr);
__ mv(t1, DataLayout::counter_increment);
__ sd(t1, Address(mdo, md->byte_offset_of_slot(data, ReceiverTypeData::receiver_count_offset(i))));
__ jump(*update_done);
__ j(*update_done);
__ bind(next_test);
}
}
Expand Down Expand Up @@ -1123,7 +1123,7 @@ void LIR_Assembler::profile_object(ciMethodData* md, ciProfileData* data, Regist
__ lbu(t0, data_addr);
__ ori(t0, t0, BitData::null_seen_byte_constant());
__ sb(t0, data_addr);
__ jump(*obj_is_null);
__ j(*obj_is_null);
__ bind(not_null);

Label update_done;
Expand Down Expand Up @@ -1196,7 +1196,7 @@ void LIR_Assembler::emit_typecheck_helper(LIR_OpTypeCheck *op, Label* success, L
typecheck_helper_slowcheck(k, obj, Rtmp1, k_RInfo, klass_RInfo, failure_target, success_target);
}

__ jump(*success);
__ j(*success);
}

void LIR_Assembler::emit_opTypeCheck(LIR_OpTypeCheck* op) {
Expand All @@ -1221,7 +1221,7 @@ void LIR_Assembler::emit_opTypeCheck(LIR_OpTypeCheck* op) {
emit_typecheck_helper(op, &success, &failure, &failure);
__ bind(failure);
__ mv(dst, zr);
__ jump(done);
__ j(done);
__ bind(success);
__ mv(dst, 1);
__ bind(done);
Expand Down Expand Up @@ -1423,7 +1423,7 @@ void LIR_Assembler::throw_op(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmit

void LIR_Assembler::unwind_op(LIR_Opr exceptionOop) {
assert(exceptionOop->as_register() == x10, "must match");
__ jump(_unwind_handler_entry);
__ j(_unwind_handler_entry);
}

void LIR_Assembler::shift_op(LIR_Code code, LIR_Opr left, LIR_Opr count, LIR_Opr dest, LIR_Opr tmp) {
Expand Down Expand Up @@ -1497,7 +1497,7 @@ void LIR_Assembler::emit_lock(LIR_OpLock* op) {
add_debug_info_for_null_check_here(op->info());
__ null_check(obj, -1);
}
__ jump(*op->stub()->entry());
__ j(*op->stub()->entry());
} else if (op->code() == lir_lock) {
assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header");
// add debug info for NullPointerException only if one is possible
Expand Down Expand Up @@ -1659,7 +1659,7 @@ void LIR_Assembler::check_conflict(ciKlass* exact_klass, intptr_t current_klass,
__ sd(t1, mdo_addr);

if (TypeEntries::is_type_none(current_klass)) {
__ jump(next);
__ j(next);

__ bind(none);
// first time here. Set profile type.
Expand Down Expand Up @@ -1729,7 +1729,7 @@ void LIR_Assembler::check_null(Register tmp, Label &update, intptr_t current_kla
__ sd(t1, mdo_addr);
}
if (do_update) {
__ jump(next);
__ j(next);
}
}

Expand Down
4 changes: 2 additions & 2 deletions src/hotspot/cpu/riscv/c1_MacroAssembler_riscv.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -162,7 +162,7 @@ void C1_MacroAssembler::try_allocate(Register obj, Register var_size_in_bytes, i
if (UseTLAB) {
tlab_allocate(obj, var_size_in_bytes, con_size_in_bytes, tmp1, tmp2, slow_case, /* is_far */ true);
} else {
jump(slow_case);
j(slow_case);
}
}

Expand Down Expand Up @@ -252,7 +252,7 @@ void C1_MacroAssembler::initialize_object(Register obj, Register klass, Register
la(t0, Address(obj, hdr_size_in_bytes + remainder * BytesPerWord));

Label entry_point, loop;
jump(entry_point);
j(entry_point);

bind(loop);
sub(index, index, 1);
Expand Down
4 changes: 2 additions & 2 deletions src/hotspot/cpu/riscv/c2_CodeStubs_riscv.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -62,7 +62,7 @@ void C2EntryBarrierStub::emit(C2_MacroAssembler& masm) {
__ bind(entry());
__ rt_call(StubRoutines::method_entry_barrier());

__ jump(continuation());
__ j(continuation());

// make guard value 4-byte aligned so that it can be accessed by atomic instructions on RISC-V
__ align(4);
Expand Down Expand Up @@ -96,7 +96,7 @@ void C2HandleAnonOMOwnerStub::emit(C2_MacroAssembler& masm) {
#endif
__ sw(t, Address(xthread, JavaThread::lock_stack_top_offset()));

__ jump(continuation());
__ j(continuation());
}

#undef __
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