Missed a ws

robehn · Apr 25, 2024 · 72c3b0b · 72c3b0b
1 parent d9e00c0
commit 72c3b0b
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp b/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp
@@ -896,7 +896,7 @@ void MacroAssembler::j(const address dest, Register temp) {
   }
 }
 
-void MacroAssembler::j(const Address &adr, Register temp) { 
+void MacroAssembler::j(const Address &adr, Register temp) {
   switch (adr.getMode()) {
     case Address::literal: {
       relocate(adr.rspec(), [&] {