Revert temp changes

robehn · Nov 21, 2024 · 9b01b89 · 9b01b89
1 parent 474662a
commit 9b01b89
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Showing 3 changed files with 1 addition and 88 deletions.
diff --git a/src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.cpp b/src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.cpp
@@ -1935,29 +1935,6 @@ static conditional_branch_insn conditional_branches[] =
   (conditional_branch_insn)&MacroAssembler::bgeu
 };
 
-static const char* conditional_branch_name[] =
-{
-  /* SHORT branches */
-  "beq",
-  "bgt",
-  "nullptr",
-  "blt",
-  "bne",
-  "ble",
-  "nullptr",
-  "bge",
-
-  /* UNSIGNED branches */
-  "beq",
-  "bgtu",
-  "nullptr",
-  "bltu",
-  "bne",
-  "bleu",
-  "nullptr",
-  "bgeu"
-};
-
 static float_conditional_branch_insn float_conditional_branches[] =
 {
   /* FLOAT SHORT branches */
@@ -2026,18 +2003,9 @@ void C2_MacroAssembler::enc_cmpEqNe_imm0_branch(int cmpFlag, Register op1, Label
 }
 
 void C2_MacroAssembler::enc_cmove(int cmpFlag, Register op1, Register op2, Register dst, Register src) {
-  Label L;
   bool is_unsigned = (cmpFlag & unsigned_branch_mask) == unsigned_branch_mask ? true : false;
   int op_select = cmpFlag & (~unsigned_branch_mask);
 
-  char buf[1024];
-  os::snprintf_checked(buf, 1024, "CMP flag: (%s) (%s) %d , op1:%s, op2:%s, dst:%s, src:%s | name:%s value:%x bef:%x",
-                  op_select ? "unsigned" : "signed", conditional_branch_name[op_select],
-                  op_select, op1->name(), op2->name(), dst->name(), src->name(),
-                  conditional_branch_name[cmpFlag ^ (1 << neg_cond_bits)], cmpFlag ^ (1 << neg_cond_bits), cmpFlag
-                  );
-  BLOCK_COMMENT(buf);
-
   switch (op_select) {
     case BoolTest::eq:
       cmov_eq(op1, op2, dst, src);

diff --git a/src/hotspot/cpu/riscv/interp_masm_riscv.cpp b/src/hotspot/cpu/riscv/interp_masm_riscv.cpp
@@ -217,63 +217,11 @@ void InterpreterMacroAssembler::get_cache_index_at_bcp(Register index,
     ShouldNotReachHere();
   }
 }
-#define TESTME(COP,CMP1,CMP2,DST,SRC,RESULT)   \
-  Label fail##COP##RESULT, start##COP##RESULT; \
-  j(start##COP##RESULT);                       \
-  bind(fail##COP##RESULT);                     \
-  stop("HERE" #COP #RESULT);                   \
-  bind(start##COP##RESULT);                    \
-  li(t0, CMP1);                                \
-  li(t1, CMP2);                                \
-  li(result, DST);                             \
-  li(tmp, SRC);                                \
-  COP(t0, t1, result, tmp);                    \
-  li(tmp, RESULT);                             \
-  bne(result, tmp, fail##COP##RESULT);
-
 
 // Load object from cpool->resolved_references(index)
 void InterpreterMacroAssembler::load_resolved_reference_at_index(
                                 Register result, Register index, Register tmp) {
-  assert_different_registers(result, index, t0, t1);
-  // MY TEST
-  TESTME(cmov_eq, 66, 67, 0, 88, 0);
-  TESTME(cmov_eq, 66, 66, 0, 88, 88);
-
-  TESTME(cmov_ne, 66, 67, 0, 88, 88);
-  TESTME(cmov_ne, 66, 66, 0, 88, 0);
-
-  TESTME(cmov_le, 66, 67, 0, 88, 88);
-  TESTME(cmov_le, 66, 66, 0, 99, 99);
-  TESTME(cmov_le, 66, -1, 0, 88, 0);
-
-  TESTME(cmov_leu, 66, -1, 0, 88, 88);
-  TESTME(cmov_leu, 66, 66, 0, 99, 99);
-  TESTME(cmov_leu, 66, 65, 0, 88, 0);
-
-  TESTME(cmov_ge, 67, -1, 0, 88, 88);
-  TESTME(cmov_ge, 66, 66, 0, 99, 99);
-  TESTME(cmov_ge, 65, 66, 0, 88, 0);
-
-  TESTME(cmov_geu, -1, 66, 0, 88, 88);
-  TESTME(cmov_geu, 66, 66, 0, 99, 99);
-  TESTME(cmov_geu, 65, 66, 0, 88, 0);
-
-  TESTME(cmov_lt, 66, 67, 0, 88, 88);
-  TESTME(cmov_lt, 66, 66, 1, 99, 1);
-  TESTME(cmov_lt, 66, -1, 0, 88, 0);
-
-  TESTME(cmov_ltu, 66, -1, 0, 88, 88);
-  TESTME(cmov_ltu, 66, 66, 1, 99, 1);
-  TESTME(cmov_ltu, 66, 65, 0, 88, 0);
-
-  TESTME(cmov_gt, 67, -1, 0, 88, 88);
-  TESTME(cmov_gt, 66, 66, 1, 99, 1);
-  TESTME(cmov_gt, 65, 66, 0, 88, 0);
-
-  TESTME(cmov_gtu, -1, 66, 0, 88, 88);
-  TESTME(cmov_gtu, 66, 66, 1, 99, 1);
-  TESTME(cmov_gtu, 65, 66, 0, 88, 0);
+  assert_different_registers(result, index);
 
   get_constant_pool(result);
   // Load pointer for resolved_references[] objArray

diff --git a/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp b/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp
@@ -181,9 +181,6 @@ void RiscvHwprobe::add_features_from_query_result() {
   if (is_set(RISCV_HWPROBE_KEY_IMA_EXT_0, RISCV_HWPROBE_EXT_ZVFH)) {
     VM_Version::ext_Zvfh.enable_feature();
   }
-  if (is_set(RISCV_HWPROBE_KEY_IMA_EXT_0, RISCV_HWPROBE_EXT_ZICOND)) {
-    VM_Version::ext_Zicond.enable_feature();
-  }
   if (is_valid(RISCV_HWPROBE_KEY_CPUPERF_0)) {
     VM_Version::unaligned_access.enable_feature(
        query[RISCV_HWPROBE_KEY_CPUPERF_0].value & RISCV_HWPROBE_MISALIGNED_MASK);