temp

src/hotspot/cpu/riscv/jvmciCodeInstaller_riscv.cpp

@@ -82,9 +82,10 @@ void CodeInstaller::pd_patch_DataSectionReference(int pc_offset, int data_offset
 void CodeInstaller::pd_relocate_ForeignCall(NativeInstruction* inst, jlong foreign_call_destination, JVMCI_TRAPS) {
   address pc = (address) inst;
   if (inst->is_jal()) {
-    NativeCall* call = nativeCall_at(pc);
+    assert(false, "Bad");
+/*    NativeCall* call = nativeCall_at(pc);
     call->set_destination((address) foreign_call_destination);
-    _instructions->relocate(call->instruction_address(), runtime_call_Relocation::spec());
+    _instructions->relocate(call->instruction_address(), runtime_call_Relocation::spec());*/
   } else if (inst->is_jump()) {
     NativeJump* jump = nativeJump_at(pc);
     jump->set_jump_destination((address) foreign_call_destination);

src/hotspot/cpu/riscv/nativeInst_riscv.cpp

@@ -121,12 +121,12 @@ bool NativeInstruction::is_li64_at(address instr) {
 }
 
 void NativeCall::verify() {
-  assert(NativeCall::is_call_at((address)this), "unexpected code at call site: %p", (address)this);
+  assert(is_load_pc_relative_at(instruction_address()), "unexpected code at call site: %p", (address)this);
 }
 
 address NativeCall::destination() const {
   address addr = (address)this;
-  assert(NativeInstruction::is_jal_at(instruction_address()), "inst must be jal.");
+  assert(is_load_pc_relative_at(instruction_address()), "Must be");
   address destination = MacroAssembler::target_addr_for_insn(instruction_address());
 
   // Do we use a trampoline stub for this call?
@@ -142,6 +142,11 @@ address NativeCall::destination() const {
   return destination;
 }
 
+void NativeCall::set_destination(address dest) {
+  assert(is_load_pc_relative_at(instruction_address()), "Must be");
+  MacroAssembler::pd_patch_instruction_size(instruction_address(), (address)dest);
+}
+
 // Similar to replace_mt_safe, but just changes the destination. The
 // important thing is that free-running threads are able to execute this
 // call instruction at all times.

src/hotspot/cpu/riscv/nativeInst_riscv.hpp

@@ -211,8 +211,16 @@ class NativeInstruction {
   static bool is_pc_relative_at(address branch);
   static bool is_load_pc_relative_at(address branch);
 
-  static bool is_call_at(address instr) {
-    if (is_jal_at(instr) || is_jalr_at(instr)) {
+  static bool is_call_at(address addr) {
+    assert_cond(addr != nullptr);
+    const int instr_size = NativeInstruction::instruction_size;
+    if (NativeInstruction::is_auipc_at(addr) &&
+        NativeInstruction::is_ld_at(addr + instr_size) &&
+        NativeInstruction::is_jalr_at(addr + 2 * instr_size) &&
+        (NativeInstruction::extract_rd(addr)                    == x5) &&
+        (NativeInstruction::extract_rd(addr + instr_size)       == x5) &&
+        (NativeInstruction::extract_rs1(addr + instr_size)      == x5) &&
+        (NativeInstruction::extract_rs1(addr + 2 * instr_size)  == x5)) {
       return true;
     }
     return false;
@@ -271,32 +279,17 @@ inline NativeCall* nativeCall_at(address addr);
 class NativeCall: public NativeInstruction {
  public:
   enum RISCV_specific_constants {
-    instruction_size            =    NativeInstruction::instruction_size,
+    instruction_size            =    3 * NativeInstruction::instruction_size,
     instruction_offset          =    0,
-    displacement_offset         =    0,
-    return_address_offset       =    NativeInstruction::instruction_size
+    return_address_offset       =    3 * NativeInstruction::instruction_size,
   };
 
   address instruction_address() const       { return addr_at(instruction_offset); }
   address next_instruction_address() const  { return addr_at(return_address_offset); }
   address return_address() const            { return addr_at(return_address_offset); }
   address destination() const;
 
-  void set_destination(address dest) {
-    assert(is_jal(), "Should be jal instruction!");
-    intptr_t offset = (intptr_t)(dest - instruction_address());
-    assert((offset & 0x1) == 0, "bad alignment");
-    assert(Assembler::is_simm21(offset), "encoding constraint");
-    unsigned int insn = 0b1101111; // jal
-    address pInsn = (address)(&insn);
-    Assembler::patch(pInsn, 31, 31, (offset >> 20) & 0x1);
-    Assembler::patch(pInsn, 30, 21, (offset >> 1) & 0x3ff);
-    Assembler::patch(pInsn, 20, 20, (offset >> 11) & 0x1);
-    Assembler::patch(pInsn, 19, 12, (offset >> 12) & 0xff);
-    Assembler::patch(pInsn, 11, 7, ra->encoding()); // Rd must be x1, need ra
-    set_int_at(displacement_offset, insn);
-  }
-
+  void set_destination(address dest);
   void verify_alignment() {} // do nothing on riscv
   void verify();
   void print();