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[LLVM][XTHeadVector] Implement intrinsics for vsmul. #75

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merged 4 commits into from
Mar 8, 2024

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zhanyi22333
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As title.

Here is my general thought on implementing intrinsics. I am a newbie in this topic and not have a complete certainty about what I did now. So I wish to discuss it here.

  1. Add test case.
    After reading the spec, I find the Intrinsic functions of vsmul and vdiv have one-to-one correspondence, which means they have the same function interface. So I just copy the test case of vdiv to vsmul and substitute 'vdiv' to vsmul. But there is a question here:

  2. Define pseudos and pats.
    I imitate other multiply intrinsics part. The cast target of WriteVSIMulV_MX is selected by searching 'vsmul' in the
    file RISCVScheduleV.td .

  3. Implement intrinsics for vsmul.
    Again, I imitate other multiply intrinsics part. I not sure that choose of 'XVBinaryABX' for th_vsmul is right now.

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@imkiva imkiva left a comment

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Thank you! LGTM

@imkiva
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imkiva commented Mar 7, 2024

WriteVSIMulV_MX is selected by searching 'vsmul' in the
file RISCVScheduleV.td

Yes, we also searched these flags in that file, and another good place for reference is RISCVInstrInfoVPseudos.td if we know there are similar instructions 😉

@ChunyuLiao ChunyuLiao merged commit 5a40acc into ruyisdk:xtheadvector Mar 8, 2024
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imkiva pushed a commit to imkiva/llvm-project that referenced this pull request Apr 1, 2024
* [NFC][XTHeadVector] Update README.

* [LLVM][XTHeadVector] Add test cases.

* [LLVM][XTHeadVector] Define pseudos and pats.

* [LLVM][XTHeadVector] Implement intrinsics for vsmul.
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3 participants