[LLVM+Clang][XTHeadVector] Implement intrinsics for vaadd and vasub
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need rebase |
YanWQ-monad
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vaadd and vasubvaadd and vasub
imkiva
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Apr 1, 2024
…b` (ruyisdk#76) * [LLVM][XTHeadVector] Define vaadd/vasub * [LLVM][XTHeadVector] Add test cases * [NFC][XTHeadVector] Update README * [LLVM][XTHeadVector] Support rounding mode for vaadd/vasub * [Clang][XTHeadVector] Define `vaadd/vasub` * [Clang][XTHeadVector] Add test cases for `vaadd/vasub`
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As title, implement intrinsics for
vaaddandvasub, which also support setting rounding mode like LLVM RVV 1.0.It is noteworthy that in the RISC-V V 0.7.1 specification, thevaadd.vi vd, vs2, imm, vmis still retained. Hence, I added theWriteVAALUIscheduler resources. I am not sure if this is the correct way, or should we drop it since the workaround only needs one moreliinstruction?Edit: after reading the discussion about xtheadvector, it would be better not to support
vaadd.vi. And that's also what gcc does (https://godbolt.org/z/Gxc1KvTn1).