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Some PRG ROM chips need a high to low transition on /CE to latch a new address. (Like the mask rom used by XEVIOUS.)
Currently the implementation of
read_prg_byte
will set /ROMSEL by A15 state but since we are dumping PRG ROM from$8000 - $FFFF so A15 keeps high during dumping process.
On real hardware /ROMSEL also controlled by PHI2 signal so after every bus cycle, /ROMSEL will always be high, which makes ROM chip working properly.