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Remove IRQn function since DMA class isn't part of PR.
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xC0000005 committed Dec 14, 2019
1 parent b188677 commit 9ca4f25
Showing 1 changed file with 0 additions and 143 deletions.
143 changes: 0 additions & 143 deletions libraries/SrcWrapper/src/stm32/dma.c
Original file line number Diff line number Diff line change
Expand Up @@ -287,149 +287,6 @@ static dma_index_t get_dma_index(
}
}

/**
* @brief This function will get the interrupt number for a DMA
* @param dma_handle : dma channel or strea
* @retval None
*/
IRQn_Type get_dma_interrupt(
#if defined(STM32F2xx) || defined(STM32F4xx) || defined(STM32F7xx)
DMA_Stream_TypeDef
#else
DMA_Channel_TypeDef
#endif
*instance)
{
switch ((uint32_t)instance) {
#ifdef DMA1_Channel1
case (uint32_t)DMA1_Channel1:
return DMA1_Channel1_IRQn;
#endif
#ifdef DMA1_Channel2
case (uint32_t)DMA1_Channel2:
return DMA1_Channel2_IRQn;
#endif
#ifdef DMA1_Channel3
case (uint32_t)DMA1_Channel3:
return DMA1_Channel3_IRQn;
#endif
#ifdef DMA1_Channel4
case (uint32_t)DMA1_Channel4:
return DMA1_Channel4_IRQn;
#endif
#ifdef DMA1_Channel5
case (uint32_t)DMA1_Channel5:
return DMA1_Channel5_IRQn;
#endif
#ifdef DMA1_Channel6
case (uint32_t)DMA1_Channel6:
return DMA1_Channel6_IRQn;
#endif
#ifdef DMA1_Channel7
case (uint32_t)DMA1_Channel7:
return DMA1_Channel7_IRQn;
#endif
#ifdef DMA2_Channel1
case (uint32_t)DMA2_Channel1:
return DMA2_Channel1_IRQn;
#endif
#ifdef DMA2_Channel2
case (uint32_t)DMA2_Channel2:
return DMA2_Channel2_IRQn;
#endif
#ifdef DMA2_Channel3
case (uint32_t)DMA2_Channel3:
return DMA2_Channel3_IRQn;
#endif
#ifdef DMA2_Channel4
case (uint32_t)DMA2_Channel4:
return DMA2_Channel4_IRQn;
#endif
#ifdef DMA2_Channel5
case (uint32_t)DMA2_Channel5:
return DMA2_Channel5_IRQn;
#endif
#ifdef DMA2_Channel6
case (uint32_t)DMA2_Channel6:
return DMA2_Channel6_IRQn;
#endif
#ifdef DMA2_Channel7
case (uint32_t)DMA2_Channel7:
return DMA2_Channel7_IRQn;
#endif
#ifdef DMA2_Channel8
case (uint32_t)DMA2_Channel8:
return DMA2_Channel8_IRQn;
#endif
#ifdef DMA1_Stream0
case (uint32_t)DMA1_Stream0:
return DMA1_Stream0_IRQn;
#endif
#ifdef DMA1_Stream1
case (uint32_t)DMA1_Stream1:
return DMA1_Stream1_IRQn;
#endif
#ifdef DMA1_Stream2
case (uint32_t)DMA1_Stream2:
return DMA1_Stream2_IRQn;
#endif
#ifdef DMA1_Stream3
case (uint32_t)DMA1_Stream3:
return DMA1_Stream3_IRQn;
#endif
#ifdef DMA1_Stream4
case (uint32_t)DMA1_Stream4:
return DMA1_Stream4_IRQn;
#endif
#ifdef DMA1_Stream5
case (uint32_t)DMA1_Stream5:
return DMA1_Stream5_IRQn;
#endif
#ifdef DMA1_Stream6
case (uint32_t)DMA1_Stream6:
return DMA1_Stream6_IRQn;
#endif
#ifdef DMA1_Stream7
case (uint32_t)DMA1_Stream7:
return DMA1_Stream7_IRQn;
#endif
#ifdef DMA2_Stream0
case (uint32_t)DMA2_Stream0:
return DMA2_Stream0_IRQn;
#endif
#ifdef DMA2_Stream1
case (uint32_t)DMA2_Stream1:
return DMA2_Stream1_IRQn;
#endif
#ifdef DMA2_Stream2
case (uint32_t)DMA2_Stream2:
return DMA2_Stream2_IRQn;
#endif
#ifdef DMA2_Stream3
case (uint32_t)DMA2_Stream3:
return DMA2_Stream3_IRQn;
#endif
#ifdef DMA2_Stream4
case (uint32_t)DMA2_Stream4:
return DMA2_Stream4_IRQn;
#endif
#ifdef DMA2_Stream5
case (uint32_t)DMA2_Stream5:
return DMA2_Stream5_IRQn;
#endif
#ifdef DMA2_Stream6
case (uint32_t)DMA2_Stream6:
return DMA2_Stream6_IRQn;
#endif
#ifdef DMA2_Stream7
case (uint32_t)DMA2_Stream7:
return DMA2_Stream7_IRQn;
#endif
default:
return NC;
}
}

/**
* @brief This function will store the DMA handle in the appropriate slot
* @param dma_handle : dma handle
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