Skip to content

Commit

Permalink
refactor(bdd): moved BitAnd impl into traits module
Browse files Browse the repository at this point in the history
  • Loading branch information
AurumTheEnd committed May 10, 2024
1 parent 92bbd7f commit a6eefcd
Show file tree
Hide file tree
Showing 4 changed files with 35 additions and 0 deletions.
1 change: 1 addition & 0 deletions src/bdd/mod.rs
Original file line number Diff line number Diff line change
@@ -1,4 +1,5 @@
mod iterators;
mod traits;

use std::collections::{BTreeMap, BTreeSet, HashMap, HashSet};
use std::fmt::Debug;
Expand Down
32 changes: 32 additions & 0 deletions src/bdd/traits/bit/and.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,32 @@
use crate::bdd::{extend_bdd_variables, Bdd};
use std::fmt::Debug;
use std::ops::BitAnd;

impl<TLiteral: Debug + Clone + Eq + Ord + 'static> BitAnd for Bdd<TLiteral> {
type Output = Bdd<TLiteral>;

fn bitand(self, rhs: Self) -> Self::Output {
if self.inputs == rhs.inputs {
Bdd {
inputs: self.inputs.clone(),
bdd: self.bdd.and(&rhs.bdd),
}
} else {
let mut common_inputs = self.inputs.clone();
for other in &rhs.inputs {
if !common_inputs.contains(other) {
common_inputs.push(other.clone());
}
}
common_inputs.sort();

let self_lifted = extend_bdd_variables(&self, &common_inputs);
let rhs_lifted = extend_bdd_variables(&rhs, &common_inputs);

Bdd {
inputs: common_inputs,
bdd: self_lifted.bdd.and(&rhs_lifted.bdd),
}
}
}
}
1 change: 1 addition & 0 deletions src/bdd/traits/bit/mod.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1 @@
mod and;
1 change: 1 addition & 0 deletions src/bdd/traits/mod.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1 @@
mod bit;

0 comments on commit a6eefcd

Please sign in to comment.