[stable-v2.12] Tools: Tplg2: cavs-sdw: Enable speaker and microphone processing

[singalsu]

This patch enables for all SDW PC topologies speaker endpoint post-processing with IIR, FIR, DRC. The IIR is set as default to 100 Hz high-pass. The FIR is pass-through. The DRC is set for a generic speaker profile.

The microphone pre-processing is enabled for devices with SDW codec connected microphone. The IIR is set to 40 Hz high-pass, and the DRC to a generic microphone profile.

Due to large amount of topologies built for SDW, the enhancements are enabled by default and disabled for some specific topologies. The explicit enable of processing for some devices we use for test are removed. For those there is no change in functionality.

Some topologies are excluded from this change

• Topologies for non-48 kHz sample rates, there are e.g. no 96 kHz blobs defined yet.
• Topology with 8ch amplifier feedback (with four speakers?)
• Chromebooks those apply post and pre-processing in closed components and/or sound server.
• sof-tgl-rt715-rt711-rt1308-mono.tplg, due to no "mono". No idea if the added processing would be compatible.

The topologies with added post-processing are (pre-processing for PCH-DMIC is already enabled):

sof-lnl-cs42l43-l0-2ch, sof-lnl-cs42l43-l0-4ch,
sof-lnl-cs42l43-l0-cs35l56-l3-2ch, sof-lnl-rt713-l0-rt1318-l1-2ch, sof-mtl-rt711-l0-rt1316-l3-2ch, sof-mtl-rt711-l0-rt1316-l3-4ch, sof-mtl-rt712-l0-2ch, sof-mtl-rt712-l0-4ch, sof-ptl-rt721-4ch, sof-ptl-rt722-4ch, sof-tgl-rt711-rt1308-4ch

The topologies with added pre- post-processing are:

sof-adl-cs42l43-l0-cs35l56-l23, sof-adl-rt711-l0-rt1308-l12-rt715-l3, sof-adl-rt711-l0-rt1316-l12-rt714-l3,
sof-adl-rt711-l0-rt1316-l13-rt714-l2, sof-arl-cs42l43-l0-cs35l56-l2, sof-arl-cs42l43-l0-cs35l56-l23, sof-arl-cs42l43-l0, sof-arl-cs42l43-l2-cs35l56-l3, sof-arl-cs42l43-l2, sof-arl-rt722-l0_rt1320-l2, sof-lnl-cs42l43-l0-cs35l56-l23, sof-lnl-cs42l43-l0-cs35l56-l3, sof-lnl-cs42l43-l0, sof-lnl-rt1318-l12-rt714-l0, sof-lnl-rt712-l2-rt1320-l1, sof-lnl-rt712-l2-rt1712-l3, sof-lnl-rt713-l2-rt1320-l13, sof-mtl-cs42l43-l0-cs35l56-l12, sof-mtl-cs42l43-l0-cs35l56-l23, sof-mtl-cs42l43-l0, sof-mtl-cs42l43-l3-cs35l56-l01-spkagg, sof-mtl-rt1318-l12-rt714-l0, sof-mtl-rt711-l0-rt1316-l3, sof-mtl-rt712-l0-rt1712-l3, sof-mtl-rt712-l0, sof-mtl-rt712-vb-l0, sof-mtl-rt713-l0-rt1316-l12-rt1713-l3,
sof-mtl-rt713-l0-rt1318-l1-rt1713-l3,
sof-mtl-rt713-l0-rt1318-l12-rt1713-l3, sof-mtl-rt722-l0, sof-ptl-rt712-l2-rt1320-l1, sof-ptl-rt713-l2-rt1320-l13, sof-ptl-rt721, sof-ptl-rt722, sof-rpl-cs42l43-l0,
sof-tgl-cs42l43-l3-cs35l56-l01, sof-tgl-rt711-rt1308-rt715, sof-tgl-rt711-rt1316-rt714, sof-tgl-rt712,

Signed-off-by: Seppo Ingalsuo [email protected]
(cherry picked from commit d81feac)