Remove redundant ticks initialization

src/machine/machine_rp2_2040.go

@@ -201,8 +201,6 @@ func (clks *clocksType) initRTC() {
 		46875)
 }
 
-func (clks *clocksType) initTicks() {} // No ticks on RP2040
-
 // startTick starts the watchdog tick.
 // cycles needs to be a divider that when applied to the xosc input,
 // produces a 1MHz clock. So if the xosc frequency is 12MHz,

src/machine/machine_rp2_2350.go

@@ -213,12 +213,6 @@ func irqSet(num uint32, enabled bool) {
 
 func (clks *clocksType) initRTC() {} // No RTC on RP2350.
 
-func (clks *clocksType) initTicks() {
-	rp.TICKS.SetTIMER0_CTRL_ENABLE(0)
-	rp.TICKS.SetTIMER0_CYCLES(12)
-	rp.TICKS.SetTIMER0_CTRL_ENABLE(1)
-}
-
 func EnterBootloader() {
 	enterBootloader()
 }
@@ -227,5 +221,9 @@ func EnterBootloader() {
 // On RP2040, the watchdog contained a tick generator used to generate a 1μs tick for the watchdog. This was also
 // distributed to the system timer. On RP2350, the watchdog instead takes a tick input from the system-level ticks block. See Section 8.5.
 func (wd *watchdogImpl) startTick(cycles uint32) {
+	rp.TICKS.SetTIMER0_CTRL_ENABLE(0)
+	rp.TICKS.SetTIMER0_CYCLES(cycles)
+	rp.TICKS.SetTIMER0_CTRL_ENABLE(1)
+
 	rp.TICKS.WATCHDOG_CTRL.SetBits(1)
 }

src/machine/machine_rp2_clocks.go

@@ -211,6 +211,4 @@ func (clks *clocksType) init() {
 		rp.CLOCKS_CLK_PERI_CTRL_AUXSRC_CLK_SYS,
 		pllSysFreq,
 		pllSysFreq)
-
-	clks.initTicks()
 }