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refactor(core/rust): introduce model features
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TychoVrahe committed Jan 15, 2025
1 parent d42df5a commit b15a315
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Showing 17 changed files with 107 additions and 16 deletions.
2 changes: 1 addition & 1 deletion core/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -161,7 +161,7 @@ test: ## run unit tests
test_rust: ## run rs unit tests
export BUILD_DIR=$(abspath $(UNIX_BUILD_DIR)) ; \
cd embed/rust ; cargo test $(TESTOPTS) --target=$(RUST_TARGET) \
--no-default-features --features $(LAYOUT_FEATURE),test \
--no-default-features --features $(LAYOUT_FEATURE),$(MODEL_FEATURE),test \
-- --test-threads=1 --nocapture

test_emu: ## run selected device tests from python-trezor
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1 change: 1 addition & 0 deletions core/embed/models/D001/config.mk
Original file line number Diff line number Diff line change
@@ -1,2 +1,3 @@
MCU = STM32F4
OPENOCD_TARGET = target/stm32f4x.cfg
MODEL_FEATURE = model_d001
1 change: 1 addition & 0 deletions core/embed/models/D002/config.mk
Original file line number Diff line number Diff line change
@@ -1,2 +1,3 @@
MCU = STM32U5
OPENOCD_TARGET = target/stm32u5x.cfg
MODEL_FEATURE = model_d002
1 change: 1 addition & 0 deletions core/embed/models/T2B1/config.mk
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
MCU = STM32F4
OPENOCD_TARGET = target/stm32f4x.cfg
LAYOUT_FEATURE = layout_samson
MODEL_FEATURE = model_t2b1
1 change: 1 addition & 0 deletions core/embed/models/T2T1/config.mk
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
MCU = STM32F4
OPENOCD_TARGET = target/stm32f4x.cfg
LAYOUT_FEATURE = layout_bolt
MODEL_FEATURE = model_t2t1
1 change: 1 addition & 0 deletions core/embed/models/T3B1/config.mk
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
MCU = STM32U5
OPENOCD_TARGET = target/stm32u5x.cfg
LAYOUT_FEATURE = layout_samson
MODEL_FEATURE = model_t3b1
1 change: 1 addition & 0 deletions core/embed/models/T3T1/config.mk
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
MCU = STM32U5
OPENOCD_TARGET = target/stm32u5x.cfg
LAYOUT_FEATURE = layout_quicksilver
MODEL_FEATURE = model_t3t1
1 change: 1 addition & 0 deletions core/embed/models/T3W1/config.mk
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
MCU = STM32U5
OPENOCD_TARGET = target/stm32u5x.cfg
LAYOUT_FEATURE = layout_bolt
MODEL_FEATURE = model_t3w1
7 changes: 7 additions & 0 deletions core/embed/rust/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,13 @@ build = "build.rs"

[features]
default = ["layout_bolt"]
model_d001 = []
model_d002 = []
model_t2t1 = []
model_t2b1 = []
model_t3b1 = []
model_t3t1 = []
model_t3w1 = []
crypto = ["zeroize"]
layout_bolt = ["jpeg"]
layout_samson = []
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77 changes: 70 additions & 7 deletions core/embed/rust/build.rs
Original file line number Diff line number Diff line change
Expand Up @@ -55,7 +55,7 @@ const DEFAULT_BINDGEN_MACROS_COMMON: &[&str] = &[
"-DUSE_BLE",
];

#[cfg(feature = "layout_bolt")]
#[cfg(feature = "model_t2t1")]
const DEFAULT_BINDGEN_MACROS_T2T1: &[&str] = &[
"-DSTM32F427",
"-DTREZOR_MODEL_T2T1",
Expand All @@ -64,11 +64,12 @@ const DEFAULT_BINDGEN_MACROS_T2T1: &[&str] = &[
"-DDISPLAY_RESX=240",
"-DDISPLAY_RESY=240",
"-DTREZOR_BOARD=\"T2T1/boards/t2t1-unix.h\"",
"-DMODEL_HEADER=\"T2T1/model_T2T1.h\"",
];
#[cfg(not(feature = "layout_bolt"))]
#[cfg(not(feature = "model_t2t1"))]
const DEFAULT_BINDGEN_MACROS_T2T1: &[&str] = &[];

#[cfg(feature = "layout_samson")]
#[cfg(feature = "model_t2b1")]
const DEFAULT_BINDGEN_MACROS_T2B1: &[&str] = &[
"-DSTM32F427",
"-DTREZOR_MODEL_T2B1",
Expand All @@ -77,11 +78,26 @@ const DEFAULT_BINDGEN_MACROS_T2B1: &[&str] = &[
"-DDISPLAY_RESX=128",
"-DDISPLAY_RESY=64",
"-DTREZOR_BOARD=\"T2B1/boards/t2b1-unix.h\"",
"-DMODEL_HEADER=\"T2B1/model_T2B1.h\"",
];
#[cfg(not(feature = "layout_samson"))]
#[cfg(not(feature = "model_t2b1"))]
const DEFAULT_BINDGEN_MACROS_T2B1: &[&str] = &[];

#[cfg(feature = "layout_quicksilver")]
#[cfg(feature = "model_t3b1")]
const DEFAULT_BINDGEN_MACROS_T3B1: &[&str] = &[
"-DSTM32U5",
"-DTREZOR_MODEL_T3B1",
"-DFLASH_BIT_ACCESS=0",
"-DFLASH_BLOCK_WORDS=4",
"-DDISPLAY_RESX=128",
"-DDISPLAY_RESY=64",
"-DTREZOR_BOARD=\"T3B1/boards/t3b1-unix.h\"",
"-DMODEL_HEADER=\"T3B1/model_T3B1.h\"",
];
#[cfg(not(feature = "model_t3b1"))]
const DEFAULT_BINDGEN_MACROS_T3B1: &[&str] = &[];

#[cfg(feature = "model_t3t1")]
const DEFAULT_BINDGEN_MACROS_T3T1: &[&str] = &[
"-DSTM32U5",
"-DTREZOR_MODEL_T3T1",
Expand All @@ -90,16 +106,63 @@ const DEFAULT_BINDGEN_MACROS_T3T1: &[&str] = &[
"-DDISPLAY_RESX=240",
"-DDISPLAY_RESY=240",
"-DTREZOR_BOARD=\"T3T1/boards/t3t1-unix.h\"",
"-DMODEL_HEADER=\"T3T1/model_T3T1.h\"",
];
#[cfg(not(feature = "layout_quicksilver"))]
#[cfg(not(feature = "model_t3t1"))]
const DEFAULT_BINDGEN_MACROS_T3T1: &[&str] = &[];

#[cfg(feature = "model_t3w1")]
const DEFAULT_BINDGEN_MACROS_T3W1: &[&str] = &[
"-DSTM32U5",
"-DTREZOR_MODEL_T3W1",
"-DFLASH_BIT_ACCESS=0",
"-DFLASH_BLOCK_WORDS=4",
"-DDISPLAY_RESX=380",
"-DDISPLAY_RESY=520",
"-DTREZOR_BOARD=\"T3W1/boards/t3w1-unix.h\"",
"-DMODEL_HEADER=\"T3W1/model_T3W1.h\"",
];
#[cfg(not(feature = "model_t3w1"))]
const DEFAULT_BINDGEN_MACROS_T3W1: &[&str] = &[];

#[cfg(feature = "model_d001")]
const DEFAULT_BINDGEN_MACROS_D001: &[&str] = &[
"-DSTM32F429",
"-DTREZOR_MODEL_D001",
"-DFLASH_BIT_ACCESS=1",
"-DFLASH_BLOCK_WORDS=1",
"-DDISPLAY_RESX=240",
"-DDISPLAY_RESY=320",
"-DTREZOR_BOARD=\"D001/boards/stm32f429i-disc1.h\"",
"-DMODEL_HEADER=\"D001/model_D001.h\"",
];
#[cfg(not(feature = "model_d001"))]
const DEFAULT_BINDGEN_MACROS_D001: &[&str] = &[];

#[cfg(feature = "model_d002")]
const DEFAULT_BINDGEN_MACROS_D002: &[&str] = &[
"-DSTM32U5",
"-DTREZOR_MODEL_T3W1",
"-DFLASH_BIT_ACCESS=0",
"-DFLASH_BLOCK_WORDS=4",
"-DDISPLAY_RESX=380",
"-DDISPLAY_RESY=520",
"-DTREZOR_BOARD=\"D002/boards/stm32u5g9j-dk.h\"",
"-DMODEL_HEADER=\"D002/model_D002.h\"",
];
#[cfg(not(feature = "model_d002"))]
const DEFAULT_BINDGEN_MACROS_D002: &[&str] = &[];

fn add_bindgen_macros<'a>(clang_args: &mut Vec<&'a str>, envvar: Option<&'a str>) {
let default_macros = DEFAULT_BINDGEN_MACROS_COMMON
.iter()
.chain(DEFAULT_BINDGEN_MACROS_T2T1)
.chain(DEFAULT_BINDGEN_MACROS_T2B1)
.chain(DEFAULT_BINDGEN_MACROS_T3T1);
.chain(DEFAULT_BINDGEN_MACROS_T3B1)
.chain(DEFAULT_BINDGEN_MACROS_T3T1)
.chain(DEFAULT_BINDGEN_MACROS_T3W1)
.chain(DEFAULT_BINDGEN_MACROS_D001)
.chain(DEFAULT_BINDGEN_MACROS_D002);

match envvar {
Some(envvar) => clang_args.extend(envvar.split(',')),
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4 changes: 3 additions & 1 deletion core/site_scons/models/D001/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,9 @@ def configure_board(

defines += (("MODEL_HEADER", '"D001/model_D001.h"'),)
defines += (("VERSIONS_HEADER", '"D001/versions.h"'),)
return configure(env, features_wanted, defines, sources, paths)
features = configure(env, features_wanted, defines, sources, paths)
features.append("model_d001")
return features


def get_model_ui() -> str:
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4 changes: 3 additions & 1 deletion core/site_scons/models/D002/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,9 @@ def configure_board(
):
defines += (("MODEL_HEADER", '"D002/model_D002.h"'),)
defines += (("VERSIONS_HEADER", '"D002/versions.h"'),)
return configure(env, features_wanted, defines, sources, paths)
features = configure(env, features_wanted, defines, sources, paths)
features.append("model_d002")
return features


def get_model_ui() -> str:
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4 changes: 3 additions & 1 deletion core/site_scons/models/T2B1/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,9 @@ def configure_board(
module = revision_map.get(revision)

if module:
return module.configure(env, features_wanted, defines, sources, paths)
features = module.configure(env, features_wanted, defines, sources, paths)
features.append("model_t2b1")
return features

raise Exception("Unknown model_r_version")

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6 changes: 4 additions & 2 deletions core/site_scons/models/T2T1/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -18,9 +18,11 @@ def configure_board(
defines += (("VERSIONS_HEADER", '"T2T1/versions.h"'),)

if revision == "emulator":
return emul(env, features_wanted, defines, sources, paths)
features = emul(env, features_wanted, defines, sources, paths)
else:
return configure(env, features_wanted, defines, sources, paths)
features = configure(env, features_wanted, defines, sources, paths)
features.append("model_t2t1")
return features


def get_model_ui() -> str:
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4 changes: 3 additions & 1 deletion core/site_scons/models/T3B1/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,9 @@ def configure_board(
module = revision_map.get(revision)

if module:
return module.configure(env, features_wanted, defines, sources, paths)
features = module.configure(env, features_wanted, defines, sources, paths)
features.append("model_t3b1")
return features

raise Exception("Unknown T3B1 revision")

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4 changes: 3 additions & 1 deletion core/site_scons/models/T3T1/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,9 @@ def configure_board(
module = revision_map.get(revision)

if module:
return module.configure(env, features_wanted, defines, sources, paths)
features = module.configure(env, features_wanted, defines, sources, paths)
features.append("model_t3t1")
return features

raise Exception("Unknown model_r_version")

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4 changes: 3 additions & 1 deletion core/site_scons/models/T3W1/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,9 @@ def configure_board(
module = revision_map.get(revision)

if module:
return module.configure(env, features_wanted, defines, sources, paths)
features = module.configure(env, features_wanted, defines, sources, paths)
features.append("model_t3w1")
return features

raise Exception("Unknown model_r_version")

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